
Detailed Description
The MAX3353E integrates a regulated charge pump,
switchable pullup/pulldown resistors, and an I
2
C-
compatible 2-wire serial interface. The internal level
shifter allows the device to operate with logic supply volt-
ages (V
L
) between +1.65V and V
CC
. The MAX3353E
’
s
OTG-compliant charge pump operates with input supply
voltages (V
CC
) from +2.6V to +5.5V and supplies an
OTG-compatible output on V
BUS
while sourcing 8mA
output current.
The MAX3353E level-detector comparators monitor impor-
tant V
BUS
voltages needed to support SRP and HNP and
provides an interrupt output signal for OTG events that
require action. The V
BUS
power-control block performs the
various switching functions required by an OTG dual-role
device and is programmable by system logic.
For OTG operation, D+ and D- are connected to switch-
able pulldown resistors (host) and switchable pullup
resistors (peripheral) controlled by internal registers.
Charge Pump
The MAX3353E
’
s OTG-compliant charge-pump operates
with input supply voltages (V
CC
) from +2.6V to +5.5V
and supplies an OTG-compatible output on V
BUS
with
the capability of sourcing 8mA (min) output current.
When V
BUS
is not providing power, an input impedance
of no more than 100k
and no less than 40k
to GND is
present on V
BUS
. When V
BUS
provides power, the rise
time on V
BUS
from 0 to 4.4V is no longer than 100ms
when driving a constant current load of 8mA and an
external load capacitance of 13μF.
During a continuous short circuit on V
BUS
, the charge-
pump output is current limited to 140mA (typ). Thermal-
shutdown circuitry turns off the charge pump if the die
temperature exceeds +150
°
C and restarts when the die
cools to 140
°
C.
Level Shifters
Internal level shifters allow the system-side interface to
run at logic supply voltages as low as 1.65V. Interface
logic signals are referenced to the voltage applied to V
L
.
M
USB On-the-Go Charge Pump with Switchable
Pullup/Pulldown Resistors
_______________________________________________________________________________________
7
Pin Description
PIN
TSSOP
1
UCSP
C5
NAME
FUNCTION
V
CC
Power-Supply Input. V
CC
input range is +2.6V to +5.5V. Bypass V
CC
to GND with a 1μF capacitor.
Logic Supply. V
L
sets the logic output high voltage and logic input high threshold for SDA, SCL,
INT
, and ID_OUT. V
L
can range from +1.65V to V
CC
. Bypass V
L
to GND with a 0.1μF capacitor.
Serial Data Input/Output. I
2
C bus serial data input/open-drain output can be driven above V
L
.
Address Select Input. Address selection for the I
2
C-compatible interface. ADD has an internal
110k
pulldown resistor (see the
2-Wire I
2
C Compatible Serial Interface
section for details).
Serial Clock Input. I
2
C bus serial clock input. Can be driven above V
L
.
Interrupt Output.
INT
is an active-low output and can be set either open-drain or push/pull output
through control register 1 (default = open drain).
2
D5
V
L
3
D4
SDA
4
C3
ADD
5
D3
SCL
6
D2
INT
7
D1
ID_OUT
Device ID Output. Output of ID_IN level translated to V
L
.
Termination Supply Input. Connect +3V to +3.6V supply voltage for internal USB pullup resistors.
Bypass V
TRM
to GND with a 0.1μF capacitor.
USB D- (±15kV ESD Protected)
USB D+ (±15kV ESD Protected)
8
C1
V
TRM
9
10
B1
A1
D-
D+
11
A2
ID_IN
Device ID Input. Internally pulled up to V
CC
. ID_IN logic state is V
L
level translated to ID_OUT and
can be read through the I
2
C interface (±15kV ESD protected).
12
13
14
15
—
A3
A4
A5
N.C.
GND
C-
C+
No Connection. Not internally connected.
Ground
Charge-Pump Capacitor Negative Connection
Charge-Pump Capacitor Positive Connection
16
B5
V
BUS
OTG Bus Supply. Provides power to the bus. V
BUS
can be back-driven to +6V. Bypass V
BUS
to
GND with a 1μF capacitor.