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參數(shù)資料
| 型號(hào)： | MAX351 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Precision, Quad, SPST Analog Switches(接通電阻35Ω,漏電流0.25nA,導(dǎo)通速率175ns,單刀單擲模擬開關(guān),DG411的改進(jìn)型) |
| 中文描述： | 高精度、四路、SPST模擬開關(guān) |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 129K |
| 代理商： | MAX351 |
M
__________Applic ations Information
Operation with S upplies Other than ±15V
The main limitation of supply voltages other than
±15V is reduced analog-signal range. The MAX351/
MAX352/MAX353 operate with ±5V to ±20V bipolar
supplies. The Typical Operating Characteristics graphs
show typical on resistance (R
ON
) for ±15V, ±10V, and
±5V supplies. (Switching times increase by a factor of
two or more for operation at ±5V.) The MAX351/
MAX352/MAX353 can operate from +10V to +30V
unipolar supplies. Each device can also be powered
from unbalanced supplies such as +24V and -5V.
Connect V- to 0V when operating with a single supply.
VL must be connected to +5V to be TTL compatible or
to V+ for CMOS-logic input levels.
Overvoltage Protec tion
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ first, followed by VL, V-, and logic
inputs. If power-supply sequencing is not possible, add
two small signal diodes in series with the supply pins
for overvoltage protection (Figure 1). Adding diodes
reduces the analog signal range to 1V below V+ and
1V below V-, but low switch resistance and low-leakage
characteristics are unaffected. Device operation is
unchanged, and the difference between V+ to V-
should not exceed +44V.
Prec ision, Quad, S PS T Analog S witc hes
6
_______________________________________________________________________________________
NAME
FUNCTION
1, 8, 9, 16
IN1-IN4
Inputs
2, 7, 10, 15
COM1-COM4
Analog Switch Common Terminal
3, 6, 11, 14
NO or NC
Switch Inputs
PIN
4
V-
Negative Supply-Voltage Input
5
GND
Ground
12
VL
Logic Supply Voltage
13
V+
Positive Supply-Voltage Input—connected to substrate
______________________________________________________________Pin Desc ription
V+
COM_
V-
NO_
Vg
V+
V-
Figure 1. Overvoltage Protection Using External Blocking
Diodes
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