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參數(shù)資料
| 型號(hào)： | MAX352ESE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 10/13頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH QUAD SPST 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 開(kāi)關(guān) |
| 電路： | 4 x SPST - NO |
| 導(dǎo)通狀態(tài)電阻： | 35 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 30 V，±4.5 V ~ 20 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
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MAX351/MAX352/MAX353
__________Applications Information
Operation with Supplies Other than ±15V
The main limitation of supply voltages other than
±15V is reduced analog-signal range. The MAX351/
MAX352/MAX353 operate with ±5V to ±20V bipolar
supplies. The Typical Operating Characteristics graphs
show typical on resistance (RON) for ±15V, ±10V, and
±5V supplies. (Switching times increase by a factor of
two or more for operation at ±5V.) The MAX351/
MAX352/MAX353 can operate from +10V to +30V
unipolar supplies. Each device can also be powered
from unbalanced supplies such as +24V and -5V.
Connect V- to 0V when operating with a single supply.
VL must be connected to +5V to be TTL compatible or
to V+ for CMOS-logic input levels.
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ first, followed by VL, V-, and logic
inputs. If power-supply sequencing is not possible, add
two small signal diodes in series with the supply pins
for overvoltage protection (Figure 1). Adding diodes
reduces the analog signal range to 1V below V+ and
1V below V-, but low switch resistance and low-leakage
characteristics are unaffected. Device operation is
unchanged, and the difference between V+ to V-
should not exceed +44V.
Precision, Quad, SPST Analog Switches
6
_______________________________________________________________________________________
______________________________________________________________Pin Description
V+
COM_
V-
NO_
Vg
V+
V-
Figure 1. Overvoltage Protection Using External Blocking
Diodes
PIN
DIP/SO
QFN
NAME
FUNCTION
1, 16, 9, 8
15, 14, 7, 6
IN1–N4
Logic Control Input
2, 15, 10, 7
16, 13, 8, 5
COM1–COM4
Analog Switch Common Terminal
3, 15, 11, 6
1, 12, 9, 4
NO or NC
Analog Switch NO or NC Terminal
4
2
V-
Negative-Supply Voltage Input
5
3
GND
Ground
12
10
VL
Logic Supply Voltage
13
11
V+
Positive-Supply Voltage Input—Connected To Substrate
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