參數(shù)資料
型號: MAX3798ETJ+T
廠商: Maxim Integrated Products
文件頁數(shù): 35/35頁
文件大?。?/td> 0K
描述: IC LIMITING AMP/VCSEL DVR 32TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 限制
電路數(shù): 1
輸出類型: 差分
電流 - 電源: 97mA
電壓 - 電源,單路/雙路(±): 2.85 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-TQFN-EP(5x5)
包裝: 帶卷 (TR)
MAX3798
1.0625Gbps to 10.32Gbps, Integrated, Low-
Power SFP+ Limiting Amplifier and VCSEL Driver
_______________________________________________________________________________________
9
RANDOM JITTER
vs. INPUT AMPLITUDE
MAX3798
toc01
INPUT AMPLITUDE (mVP-P)
RANDOM
JITTER
(ps)
1000
800
600
400
200
310
320
330
340
350
360
370
300
0
1200
AT 4.25Gbps MODE_SEL = 0
AT 8.5Gbps MODE_SEL = 1
DETERMINISTIC JITTER
vs. INPUT AMPLITUDE AT 4.25Gbps
MAX3798
toc02
INPUT AMPLITUDE (mVP-P)
DETERMINISTIC
JITTER
(ps)
1000
800
600
400
200
4
5
6
7
8
9
10
11
12
3
0
1200
PATTERN = k28.5, MODE_SELECT = 0
SLEW_RATE = 0
SLEW_RATE = 1
DETERMINISTIC JITTER
vs. INPUT AMPLITUDE
MAX3798
toc03
INPUT AMPLITUDE (mVP-P)
DETERMINISTIC
JITTER
(ps)
1000
800
600
400
200
2
3
4
5
6
7
1
0
1200
PATTERN = PRBS, MODE_SEL = 1
AT 8.5Gbps
AT 10.32Gbps
DETERMINISTIC JITTER
vs. DATA RATE
MAX3798
toc04
DATA RATE (Gbps)
DETERMINISTIC
JITTER
(ps)
10
8
2
4
6
3
4
5
6
7
8
9
10
2
012
PATTERN = k28.5
MODE_SEL = 0, SLEW_RATE = 1
MODE_SEL = 1
BER
vs. INPUT AMPLITUDE
INPUT AMPLITUDE (mVP-P)
BER
2.0
1.5
1.0
1.0E-08
1.0E-09
1.0E-10
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E-11
0.5
2.5
MAX3798
toc05
AT 8.5Gbps
MODE_SEL = 0
AT 8.5Gbps
MODE_SEL = 1
OUTPUT EYE DIAGRAM AT 10.32Gbps
MAX3798 toc06
20ps/div
50mV/div
OUTPUT EYE DIAGRAM AT 8.5Gbps
MAX3798 toc07
20ps/div
50mV/div
OUTPUT EYE DIAGRAM AT 4.25Gbps
MAX3798 toc08
50ps/div
50mV/div
MODE_SEL = 1
OUTPUT EYE DIAGRAM AT 4.25Gbps
MAX3798 toc09
50ps/div
100mV/div
MODE_SEL = 0, SLEW_RATE = 1
Typical Operating Characteristics—Limiting Amplifier
(VCC = 3.3V, TA = +25°C, unless otherwise specified. Figure 1 shows the typical setup used for measurements. Registers are set to
default values unless otherwise noted, and the 3-wire interface is static during measurements. For testing, the MODE_SEL bit was
used and the MSEL pin was left open.)
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