× 2 Crosspoint Switch 4 ________________________________________________________" />
參數(shù)資料
型號(hào): MAX3841ETG+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 4/7頁(yè)
文件大?。?/td> 0K
描述: IC SW CROSSPOINT 2X2 24-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 75
應(yīng)用: 數(shù)據(jù)傳輸
電源電壓: 3 V ~ 3.6 V
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 管件
安裝類型: 表面貼裝
MAX3841
12.5Gbps CML 2
× 2 Crosspoint Switch
4
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1, 12
VCC
+3.3V Core Supply Voltage
2, 5
VCC1IN
Supply Voltage for CML Input IN1. Connect to 1.8V, 2.5V, or 3.3V.
3
IN1+
Positive Serial Data Input 1, CML
4
IN1-
Negative Serial Data Input 1, CML
6
SEL1
Output 1 Select, LVCMOS Input. See Table 1.
7
SEL2
Output 2 Select, LVCMOS Input. See Table 1.
8, 11
VCC2IN
Supply Voltage for CML Input IN2. Connect to 1.8V, 2.5V, or 3.3V.
9
IN2+
Positive Serial Data Input 2, CML
10
IN2-
Negative Serial Data Input 2, CML
13, 24
GND
Supply Ground
14, 17
VCC1OUT
Supply Voltage for CML Output OUT1. Connect to 1.8V, 2.5V, or 3.3V.
15
OUT1-
Negative Serial Data Output 1, CML
16
OUT1+
Positive Serial Data Output 1, CML
18
ENO1
Output 1 Enable, LVCMOS Input. See Table 1.
19
ENO2
Output 2 Enable, LVCMOS Input. See Table 1.
20, 23
VCC2OUT
Supply Voltage for CML Output OUT2. Connect to 1.8V, 2.5V, or 3.3V.
21
OUT2-
Negative Serial Data Output 2, CML
22
OUT2+
Positive Serial Data Output 2, CML
EP
Exposed Pad. The exposed pad must be soldered to the circuit board ground for proper thermal and
electrical performance.
Detailed Description
The MAX3841 contains a pair of CML inputs that drive
two 2:1 multiplexers, with separate select inputs SEL1
and SEL2, providing a 2
× 2 crosspoint data path. The
outputs of the multiplexers each drive a high-perfor-
mance CML output that can be disabled (powered
down) using the ENO1/ENO2 inputs. All of the data
paths are fully differential to minimize jitter, crosstalk,
and signal skew. See Figure 1 for the functional diagram.
CML Input and Output Buffers
The MAX3841 input and output buffers are terminated
with 50
Ω to independent supply lines, and are also com-
patible with 100
Ω differential terminations. (See Figures 3
and 4.) Separate power-supply connections are provided
for the core, input buffers, and output buffers to allow DC-
coupling to 1.8V, 2.5V, or 3.3V CML ICs. If desired, the
CML inputs and outputs can be AC-coupled.
The CML inputs accept serial NRZ data with differential
amplitude from 150mVP-P to 1200mVP-P (see Figure 2).
The CML outputs provide 500mVP-P nominal differential
swing, resulting in low power consumption.
MAX3841
CML
1
0
1
0
OUT1
ENO1
SEL1
OUT2
ENO2
SEL2
IN1
IN2
2
Figure 1. Functional Diagram
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