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參數(shù)資料
| 型號： | MAX3964AETP+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP LIMITING SGNL DET 20-TQFN |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 75 |
| 類型： | 限幅放大器 |
| 應用： | 光纖學網(wǎng)絡 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 20-TQFN-EP（4x4） |
| 包裝： | 管件 |
MAX3964A/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
_______________________________________________________________________________________
5
Pin Description
PIN
QSOP
THIN
QFN
NAME
FUNCTION
1
19
SQUELCH
Squelch Input. The squelch function disables the data outputs by forcing OUT- low and OUT+
high during a loss-of-signal condition. Connect to GND or leave unconnected to disable.
Connect to VCC to enable squelching.
2
20
VTH
Output of Internal Op Amp that Sets Loss-of-Signal Threshold Voltage (Figure 1). Connect a
resistor from VTH to INV and from INV to ground (minimum resistance 100k) to program the
desired threshold voltage.
3
1
INV
Inverting Input of Internal Op Amp that Sets Loss-of-Signal Threshold Voltage (Figure 1).
Connect a resistor from VTH to INV and from INV to ground (minimum resistance 100k) to
program the desired threshold voltage.
4
2
FILTER
Filter Output of Full-Wave Logarithmic Detectors (FWDs). The FWD outputs are summed
together at FILTER to generate the received-signal-strength indicator (RSSI). Connect a
capacitor from FILTER to VCC for proper operation.
5
3
RSSI
Received-Signal-Strength Indicator Output. The analog DC voltage at RSSI indicates the input
signal power. The RSSI output is reduced approximately 120mV when LOS+ is asserted.
6
4
IN-
Inverting Data Input
7
5
IN+
Noninverting Data Input
8
—
SUB
Substrate. Connect to ground.
9, 10
6, 7, 8
GND
Ground
11
9
CZP
Auto-Zero Capacitor Input. Connect a capacitor between CZP and CZN to determine the offset-
correction-loop bandwidth.
12
10
CZN
Auto-Zero Capacitor Input. Connect a capacitor between CZP and CZN to determine the offset-
correction-loop bandwidth.
13
11
VCCO
Output Buffer Supply Voltage. Connect to the same potential as VCC, but filter VCCO and VCC
separately.
14
12
OUT+
Noninverting PECL Data Output. Terminate with 50 to (VCC - 2V).
15
13
OUT-
Inverting PECL Data Output. Terminate with 50 to (VCC - 2V).
16
14
LOS-
Inverting Loss-of-Signal Output. LOS- is asserted low when input power drops below the LOS
threshold. This pin is PECL compatible and should be terminated with 50 to (VCC - 2V).
17
15
LOS+
Noninverting Loss-of-Signal Output. LOS+ is asserted high when input power drops below the
LOS threshold. This pin is PECL compatible and should be terminated with 50 to (VCC - 2V).
18
16
VCCO
MAX3964A/MAX3968: This pin can be left open or connected to the positive supply.
19, 20
17, 18
VCC
+3.0V to +5.5V Supply Voltage
—EP
Exposed
Pad
Connect the exposed pad to board ground for optional electrical and thermal performance.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3964AETP+ | 功能描述:限幅放大器 3-5.5V 125-266Mbps Limiting Amp RoHS:否 制造商:Micrel 輸入電壓范圍（最大值）:3.6 V 工作電源電壓:3.3 V 電源電流:40 mA 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Tube |
| MAX3964AETP+T | 功能描述:限幅放大器 3-5.5V 125-266Mbps Limiting Amp RoHS:否 制造商:Micrel 輸入電壓范圍（最大值）:3.6 V 工作電源電壓:3.3 V 電源電流:40 mA 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Tube |
| MAX3964AETP-T | 功能描述:限幅放大器 3-5.5V 125-266Mbps Limiting Amp RoHS:否 制造商:Micrel 輸入電壓范圍（最大值）:3.6 V 工作電源電壓:3.3 V 電源電流:40 mA 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Tube |
| MAX3964C/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX3964CEP | 制造商:Maxim Integrated Products 功能描述:+3.0V TO +5.5V, 125MBPS TO 266MBPS LINITING A - Bulk |
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