參數(shù)資料
型號: MAX3984UTE+T
廠商: Maxim Integrated Products
文件頁數(shù): 5/18頁
文件大?。?/td> 0K
描述: IC PREMP DRIVER 1CH 16-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 驅(qū)動(dòng)器
驅(qū)動(dòng)器/接收器數(shù): 1/0
規(guī)程: 以太網(wǎng)
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-TQFN-EP(3x3)
包裝: 帶卷 (TR)
MAX3984
1Gbps to 10Gbps Preemphasis Driver with
Receive Equalizer
______________________________________________________________________________________
13
Note 1: Load is 50
Ω ±1% at each side and the pattern is 0000011111 or equivalent pattern at 2.5Gbps.
Note 2: PE1 = PE0 = logic-high (maximum preemphasis), load is 50
Ω ±1% at each side. The pattern is 11001100 (50% edge densi-
ty) at 10Gbps. AC common-mode output is computed as:
VACCM_RMS = RMS[(VP + VN) / 2) - VDCCM]
where:
VP = time-domain voltage measured at OUT+ with at least 10GHz bandwidth.
VN = time-domain voltage measured at OUT- with at least 10GHz bandwidth.
AC common-mode voltage (VACCM_RMS) expressed as an RMS value.
DC common-mode voltage (VDCCM) = average DC voltage of (VP + VN) / 2.
Note 3: Pattern is 0000011111 or equivalent pattern at 10Gbps and 100mVP-P differential swing. IN_LEV = logic-low and PE0 = PE1
= logic-low for minimum preemphasis. Signal transition time is controlled by the 4th-order BT filter (7.5GHz bandwidth) or
equivalent. See Figure 3 for setup.
Note 4: Test pattern (464 bits): 100 zeros, 1010, PRBS7, 100 ones, 0101, PRBS7.
Note 5: Input range selection is IN_LEV = logic-high for FR-4 input equalization. Cables are unequalized, Amphenol Spectra-Strip
(160-2499-997) 24 AWG or equivalent. Residual deterministic jitter is the difference between the source jitter at point A and
the load jitter point D in Figure 2. The deterministic jitter (DJ) at the output of the transmission line must be from media
induced loss and not from clock source modulation. DJ is measured at point D of Figure 2.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Source to IN
OUT to
load
PE1
PE0
3m,
24 AWG
0
1
5m,
24 AWG
1
0
7m,
24 AWG
1
Residual Output Deterministic
Jitter at 10Gbps (Notes 4, 5)
6-mil, 10in of
FR-4
10m,
24 AWG
1
0.25
UIP-P
Table 1. Typical Characteristics at -40°C (continued)
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