參數(shù)資料
型號(hào): MAX4294ESD+T
廠商: Maxim Integrated Products
文件頁數(shù): 17/18頁
文件大?。?/td> 0K
描述: IC OP AMP R-R I/O 14-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 通用
電路數(shù): 4
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.2 V/µs
增益帶寬積: 500kHz
電流 - 輸入偏壓: 15nA
電壓 - 輸入偏移: 200µV
電流 - 電源: 100µA
電流 - 輸出 / 通道: 20mA
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V,±0.9 V ~ 2.75 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
Detailed Description
Rail-to-Rail Input Stage
The MAX4291/MAX4292/MAX4294 have rail-to-rail
inputs and output stages that are specifically designed
for low-voltage, single-supply operation in the smallest
package possible. The input stage consists of separate
NPN and PNP differential stages, which operate togeth-
er to provide a common-mode range extending to both
supply rails. The crossover region of these two pairs
occurs halfway between VCC and VEE. The input offset
voltage is typically ±200V (MAX4292/MAX4294). Low
operating supply voltage, low supply current, rail-to-rail
common-mode input range, and rail-to-rail outputs
make this family of operational amplifiers (op amps) an
excellent choice for precision or general-purpose, low-
voltage, battery-powered systems.
Since the input stage consists of NPN and PNP pairs,
the input bias current changes polarity as the common-
mode voltage passes through the crossover region.
Match the effective impedance seen by each input to
reduce the offset error caused by input bias currents
flowing through external source impedances (Figures
1a and 1b).
The combination of high-source impedance plus input
capacitance (amplifier input capacitance plus stray
MAX4291/MAX4292/MAX4294
Ultra-Small, 1.8V, Power,
Rail-to-Rail I/O Op Amps
8
_______________________________________________________________________________________
Pin Description
R3
IN
R3 = R1
R2
R1
R2
MAX4291
MAX4292
MAX4294
R3
R3 = R1
R2
R1
R2
MAX4291
MAX4292
MAX4294
IN
Figure 1a. Minimizing Offset Error Due to Input Bias Current
(Noninverting)
Figure 1b. Minimizing Offset Error Due to Input Bias Current
(Inverting)
PIN
MAX4292
MAX4291
MAX/SO
UCSP
MAX4294
NAME
FUNCTION
1
——
IN+
Noninverting Input
2
4
C2
11
VEE
Negative Supply. Connect to ground for
single-supply operation.
3
——
IN-
Inverting Input
4
——
OUT
Amplifier Output
5
8
A2
4
VCC
Positive Supply
1, 7
A1, A3
1, 7
OUTA, OUTB
Outputs for Amplifiers A and B
2, 6
B1, B3
2, 6
INA-, INB-
Inverting Inputs to Amplifiers A and B
3, 5
C1, C3
3, 5
INA+, INB+
Noninverting Inputs to Amplifiers A and B
——
8, 14
OUTC, OUTD
Outputs for Amplifiers C and D
——
9, 13
INC-, IND-
Inverting Inputs to Amplifiers C and D
——
10, 12
INC+, IND+
Noninverting Inputs to Amplifiers C and D
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MAX4294EUD 功能描述:運(yùn)算放大器 - 運(yùn)放 1.8V uPower Rail-Rail RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
MAX4294EUD+ 功能描述:運(yùn)算放大器 - 運(yùn)放 1.8V uPower Rail-Rail RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
MAX4294EUD+T 功能描述:運(yùn)算放大器 - 運(yùn)放 1.8V uPower Rail-Rail RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
MAX4294EUD-T 功能描述:運(yùn)算放大器 - 運(yùn)放 1.8V uPower Rail-Rail RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
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