參數(shù)資料
型號(hào): MAX4357ECD+D
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 27/42頁(yè)
文件大小: 0K
描述: IC VIDEO CROSSPOINT SWIT 128TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 72
功能: 視頻交叉點(diǎn)開(kāi)關(guān)
電路: 1 x 32:16
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 5V,± 3 V ~ 5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 1389 (CN2011-ZH PDF)
其它名稱: MAX4357ECD+
MAX4357ECD+-ND
MAX4357
32 x 16 Nonblocking Video Crosspoint Switch
with I/O Buffers
______________________________________________________________________________________
33
The wired-OR connection of the outputs shown in the
diagram is possible because the outputs of the IC
devices can be placed in a disabled, or high-imped-
ance-output state. This disable state of the output
buffers is designed for a maximum impedance vs. fre-
quency while maintaining a low-output capacitance.
These characteristics minimize the adverse loading
effects from the disabled outputs. Larger arrays are
constructed by extending this connection technique to
more devices.
Driving a Capacitive Load
Figure 6 shows an implementation requiring many out-
puts to be wired together. This creates a situation
where each output buffer sees not only the normal load
impedance, but also the disabled impedance of all the
other outputs. This impedance has a resistive and a
capacitive component. The resistive components
reduce the total effective load for the driving output.
Total capacitance is the sum of the capacitance of all
the disabled outputs and is a function of the size of the
matrix. Also, as the size of the matrix increases, the
length of the PC board traces increases, adding more
capacitance. The output buffers have been designed to
drive more than 30pF of capacitance while still main-
taining a good AC response. Depending on the size of
the array, the capacitance seen by the output can
exceed this amount. There are several ways to improve
the situation. The first is to use more building-block
crosspoint devices to reduce the number of outputs
that need to be wired together (Figure 7).
In Figure 7, the additional devices are placed in a sec-
ond bank to multiplex the signals. This reduces the
number of wired-OR connections. Another solution is to
put a small resistor in series with the output before the
capacitive load to limit excessive ringing and oscilla-
tions. Figure 8 shows the Optimal Isolation Resistor vs.
Capacitive Load. A lowpass filter is created from the
series resistor and parasitic capacitance to ground.
INPUT
ADDRESS
0
(LSB)
=
0
OUTPUT
ENABLE
INPUT
ADDRESS
1
=
0
INPUT
ADDRESS
4
(MSB)
=
1
GAIN
SET
=
+1V/V
INPUT
ADDRESS
2
=
0
INPUT
ADDRESS
3
=
0
SCLK
DIN
EXAMPLE OF 16-BIT SERIAL CONTROL WORD FOR OUTPUT CONTROL IN INDIVIDUAL OUTPUT ADDRESS MODE
OUTPUT (i) ENABLED, AV = +1V/V,
CONNECTED TO INPUT 16
UPDATE
OUTPUT
ADDRESS
B0
OUTPUT
ADDRESS
B1
OUTPUT
ADDRESS
B2
OUTPUT
ADDRESS
B3
IC
ADDRESS
A0
IC
ADDRESS
A1
IC
ADDRESS
A2
IC
ADDRESS
A3
IC ADDRESS = 2
OUTPUT ADDRESS = 9
MODE
16-BIT INDIVIDUAL OUTPUT ADDRESS MODE:
FIRST BIT IS A DON'T CARE BIT, LAST 15 BITS CLOCKED INTO DIN WHEN MODE = 0, CREATES ADDRESS WORD; IC ADDRESS A3–A0 IS COMPARED TO DIN14–DIN11
WHEN UPDATE IS LOW; IF EQUAL, ADDRESSED OUTPUT IS UPDATED.
DON'T
CARE
X
tSuMd
tHdMd
Figure 3. Mode 0, Individual Output Address Mode Timing and Programming Example
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