參數(shù)資料
型號(hào): MAX44264EWT+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 9/10頁(yè)
文件大?。?/td> 0K
描述: IC OP AMP R-R SGL 6-WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
放大器類型: 通用
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.002 V/µs
增益帶寬積: 9kHz
電流 - 輸入偏壓: 200pA
電壓 - 輸入偏移: 500µV
電流 - 電源: 0.75µA
電流 - 輸出 / 通道: 36mA
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 6-WFBGA,WLPBGA
供應(yīng)商設(shè)備封裝: 6-WLP(1.27x.87)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MAX44264EWT+TDKR
MAX44264
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
8
_______________________________________________________________________________________
Applications Information
Ground Sensing
The common-mode input range of the MAX44264
extends down to ground, and offers excellent common-
mode rejection. These devices are guaranteed not to
undergo phase reversal when the input is overdriven.
Power Supplies and Layout
The IC operates from a single +1.8V to +5.5V power
supply. Bypass power supplies with a 0.1F ceramic
capacitor placed close to the VDD pin.
Ground layout improves performance by decreasing the
amount of stray capacitance and noise at the op amp’s
inputs and outputs. To decrease stray capacitance, mini-
mize PCB lengths and resistor leads, and place external
components close to the op amps’ pins.
Bandwidth
The IC is internally compensated for unity-gain stability
and has a typical gain-bandwidth of 9kHz.
Stability
The IC maintains stability in their minimum gain configu-
ration while driving capacitive loads. Although this prod-
uct family is primarily designed for low-frequency
applications, good layout is extremely important
because low-power requirements demand high-imped-
ance circuits. The layout should also minimize stray
capacitance at the amplifier inputs. However some stray
capacitance may be unavoidable, and it may be neces-
sary to add a 2pF to 10pF capacitor across the feedback
resistor as shown in Figure 1. Select the smallest capaci-
tor value that ensures stability.
Pin Description
PIN
NAME
FUNCTION
A1
IN+
Noninverting Amplifier Input
A2
VSS
Negative Power-Supply Voltage
B1
IN-
Inverting Amplifier Input
B2
VDD
Positive Power-Supply Voltage
C1
OUT
Amplifier Output
C2
N.C.
No Connection. Not internally connected.
R1
2pF TO 10pF
R2
VIN
VCC
VSS
MAX44264
Figure 1. Compensation for Feedback Node Capacitance
Chip Information
PROCESS: BiCMOS
WLP BUMP
SIDE DOWN
OUT
N.C.
IN-
VDD
IN+
VSS
C1
C2
B1
B2
A2
A1
+
TOP VIEW
MAX44264
Pin Configuration
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