參數(shù)資料
型號: MAX4520EUT-T
廠商: Maxim Integrated Products
文件頁數(shù): 11/12頁
文件大?。?/td> 0K
描述: IC SWITCH SPST SOT23-6
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
功能: 開關
電路: 1 x SPST- NO
導通狀態(tài)電阻: 390 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 9 V ~ 36 V,±4.5 V ~ 20 V
電流 - 電源: 50µA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應商設備封裝: SOT-6
包裝: 帶卷 (TR)
MAX451
0
/MAX452
0
Rail-to-Rail, Fault-Protected,
SPST Analog Switches
8
_______________________________________________________________________________________
Overview of MAX4510/MAX4520
The MAX4510/MAX4520 differ considerably from tradi-
tional fault-protection switches, with several advan-
tages. First, they are constructed with two parallel
FETs, allowing very low on-resistance when the switch
is on. Second, they allow signals on the NC or NO pins
that are within or slightly beyond the supply rails to be
passed through the switch to the COM terminal, allow-
ing rail-to-rail signal operation. Third, when a signal on
NC or NO exceeds the supply rails by about 50mV (a
fault condition), the voltage on COM is limited to the
appropriate polarity supply voltage. Operation is identi-
cal for both fault polarities. The fault-protection extends
to ±36V from GND.
During a fault condition, the NO or NC input pin
becomes high impedance regardless of the switch
state or load resistance. If the switch is on, the COM
output current is furnished from the V+ or V- pin by
“booster” FETs connected to each supply pin. These
FETs can typically source or sink up to 13mA.
When power is removed, the fault protection is still in
effect. In this case, the NO or NC terminals are a virtual
open circuit. The fault can be up to ±40V.
The COM pin is not fault protected; it acts as a normal
CMOS switch pin. If a voltage source is connected to
the COM pin, it should be limited to the supply volt-
ages. Exceeding the supply voltage will cause high
currents to flow through the ESD protection diodes,
possibly damaging the device (see Absolute Maximum
Ratings).
Internal Construction
Internal construction is shown in Figure 1, with the ana-
log signal paths shown in bold. A single normally open
(NO) switch is shown; the normally closed (NC) config-
uration is identical except the logic-level translator
becomes an inverter. The analog switch is formed by
the parallel combination of N-channel FET N1 and P-
channel FET P1, which are driven on and off simultane-
ously according to the input fault condition and the
logic-level state.
V+
NO
(NC)
IN
GND
V-
HIGH
FAULT
LOW
FAULT
ON
N1
P1
P2
COM
N2
NC SWITCH
-ESD DIODE
NORMALLY OPEN SWITCH CONSTRUCTION
MAX4510
MAX4520
Figure 1. Functional Diagram
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