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  • 參數(shù)資料
    型號: MAX4529ESA
    廠商: Maxim Integrated Products
    文件頁數(shù): 10/12頁
    文件大?。?/td> 0K
    描述: IC VIDEO SWITCH SPST 8SOIC
    產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
    Obsolescence Mitigation Program
    標(biāo)準(zhǔn)包裝: 100
    功能: 視頻開關(guān)
    電路: 1 x SPST- NC
    導(dǎo)通狀態(tài)電阻: 120 歐姆
    電壓電源: 單/雙電源
    電壓 - 電源,單路/雙路(±): 2.7 V ~ 12 V,± 2.7 V ~ 6 V
    電流 - 電源: 50µA
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
    供應(yīng)商設(shè)備封裝: 8-SOIC
    包裝: 管件
    MAX4529
    Low-Voltage, Bidirectional
    RF/Video Switch
    _______________________________________________________________________________________
    7
    Pin Description
    6
    FUNCTION*
    SOT23-6
    NAME
    Analog Switch Common** Terminal. Analog signal voltages should never exceed
    V+ or V-.
    7
    Not Internally Connected
    PIN
    1
    COM
    Analog Switch Normally Closed** Terminal
    2
    Positive Supply-Voltage Input (analog and digital). The voltage difference between
    V+ and V- should never exceed 12V.
    5
    RF and Logic Ground. Connect to ground plane.
    3
    -5V Supply Input. Connect to GND for single-supply operation.
    DIP/SO/MAX
    1, 6
    2
    8
    3
    5
    N.C.
    NC
    V+
    GND
    V-
    *
    All pins except N.C. have ESD diodes to V- and V+.
    ** NC and COM pins are identical and interchangeable. Either may be considered as an input or output; signals pass equally well in
    either direction.
    Theory of Operation
    Logic-Level Translators
    The MAX4529 is constructed as a high-frequency “T”
    switch, as shown in Figure 1. The logic-level input, IN,
    is translated by amplifier A1 into a V+ to V- logic signal
    that drives inverter A2. Amplifier A2 drives the gates of
    N-channel MOSFETs N1 and N2 from V+ to V-, turning
    them fully on or off. The same signal drives inverter A3
    (which drives the P-channel MOSFETs P1 and P2) from
    V+ to V-, turning them fully on or off, and drives the N-
    channel MOSFET N3 off and on.
    The logic-level threshold is determined by V+ and
    GND. The voltage on GND is usually at ground poten-
    tial, but it may be set to any voltage between
    (V+ - 2V) and V-. When the voltage between V+ and
    GND is less than 2V, the level translators become very
    slow and unreliable. Normally, GND should be connect-
    ed to the ground plane.
    Switch On Condition
    When the switch is on, MOSFETs N1, N2, P1, and P2
    are on and MOSFET N3 is off. The signal path is COM to
    NC, and because both N-channel and P-channel
    MOSFETs act as pure resistances, it is symmetrical (i.e.,
    signals may pass in either direction). The off MOSFET,
    N3, has no DC conduction, but has a small amount of
    capacitance to GND. The four on MOSFETs also have
    capacitance to ground that, together with the series
    resistance, forms a lowpass filter. All of these capaci-
    tances are distributed evenly along the series resis-
    tance, so they act as a transmission line rather than a
    simple R-C filter. This helps to explain the exceptional
    300MHz bandwidth when the switches are on.
    Typical attenuation in 50
    systems is -2dB and is rea-
    sonably flat up to 100MHz. Higher-impedance circuits
    show even lower attenuation (and vice versa), but
    slightly lower bandwidth due to the increased effect of
    the internal and external capacitance and the switch’s
    internal resistance.
    A1
    A2
    A3
    S
    P1
    N3
    D
    N1
    V-
    GND
    IN
    V+
    V-
    COM
    NC
    S
    D
    N2
    S
    P2
    D
    NORMALLY CLOSED SWITCH CONSTRUCTION
    COM - NC
    IN
    0
    1
    ON
    OFF
    ESD DIODES
    ON GND, IN,
    COM, AND NC
    Figure 1. T-Switch Construction
    4
    Logic-Level Control Input. Logic-level voltages should never exceed V+ or V-.
    4
    IN
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