參數(shù)資料
型號: MAX456CQH+TD
廠商: Maxim Integrated Products
文件頁數(shù): 11/12頁
文件大小: 0K
描述: IC VIDEO CROSSPOINT SWIT 44PLCC
標準包裝: 500
功能: 視頻交叉點開關
電路: 1 x 8:8
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應商設備封裝: 44-PLCC(16.59x16.59)
包裝: 帶卷 (TR)
MAX456
________________Typical Application
Figure 2 shows a typical application of the MAX456 with
MAX470 quad, gain-of-two buffers at the outputs to
drive 75
loads. This application shows the MAX456
digital-switch control interface set up in the 7-bit paral-
lel mode. The MAX456 uses 7 data lines and 2 control
lines (WR and LATCH). Two additional lines may be
needed to control CE and LOAD when using multiple
MAX456s.
The input/output information is presented to the chip at
A2-A0 and D3-D0 by a parallel printer port. The data is
stored in the 1st-rank registers on the rising edge of
WR. When the LATCH line goes high, the switch con-
figuration is loaded into the 2nd-rank registers, and all 8
outputs enter the new configuration at the same time.
Each 7-bit word updates only one output buffer at a
time. If several buffers are to be updated, the data is
individually loaded into the 1st-rank registers. Then, a
single LATCH pulse is used to reconfigure all channels
simultaneously.
The short Basic program in Figure 3 loads programming
data into the MAX456 from any IBM PC or compatible.
It uses the computer’s “LPT1” output to interface to the
circuit, then automatically finds the address for LPT1
and displays a table of valid input values to be used.
The program does not keep track of previous com-
mands, but it does display the last data sent to LPT1,
which is written and latched with each transmission.
8 x 8 Video Crosspoint Switch
8
_______________________________________________________________________________________
5
7
11
9
13
15
17
19
39
37
35
33
1
3
6
8
10
2,7,15 4,5,12,13
-5V
16
75
75
14
11
9
31
29
27
25
24
14
8
40
26
22
21
3
4
6
36
38
1
2
28, 30, 32
10, 12
20
34
23
18
16
1
2
3
4
5
6
7
8
18
19
20
21
22
23
24
25
14
8-INPUT
VIDEO
CHANNELS
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
LATCH
WR
D0/SER IN
D1/SER OUT
D2
D3
A0
A1
A2
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
CE
EDGE/LEVEL
LOAD
V+
AGND
DGND
V-
CE
SER/PAR
V+
+5V
-5V
+5V
ALL BYPASS CAPACITORS 0.1
F CERAMIC
DB-25
MAX456
IN1
IN2
IN3
V+
GND
V-
OUT1
IN0
OUT0
AV = 2
OUT2
OUT3
MAX470
Figure 2. Typical Application Circuit
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