參數(shù)資料
型號: MAX4588EAI+T
廠商: Maxim Integrated Products
文件頁數(shù): 5/20頁
文件大?。?/td> 0K
描述: IC RF/VIDEO MUX DUAL 4CH 28-SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
功能: 視頻多路復(fù)用器/多路分解器
電路: 2 x 4:1
導(dǎo)通狀態(tài)電阻: 60 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 2.7 V ~ 12 V,± 2.7 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 帶卷 (TR)
Detailed Description
Logic-Level Translators
The MAX4588 is constructed of high-frequency “T”
switches, as shown in Figure 8. The logic-level inputs
are translated by amplifier A1 into a V+ to V- logic sig-
nal that drives amplifier A2. Amplifier A2 drives the
gates of N-channel MOSFETs N1 and N2 from V+ to V-,
turning them fully on or off. The same signal drives
inverter A3 (which drives the P-channel MOSFETs P1
and P2, turning them fully on or off) from V+ to V-, and
turns the N-channel MOSFET N3 on and off. The logic-
level threshold is determined by VL and GND.
Switch On Condition
When the switch is on, MOSFETs N1, N2, P1, and P2
are on and MOSFET N3 is off (Figure 8). The signal
path is COM_ to NO_, and because both N-channel
and P-channel MOSFETs act as pure resistances, it is
symmetrical (i.e., signals may pass in either direction).
The off MOSFET, N3, has no DC conduction, but has a
small amount of capacitance to GND. The four on
MOSFETs also have capacitance to ground that,
together with the series resistance, forms a lowpass fil-
ter. All of these capacitances are distributed evenly
along the series resistance, so they act as a transmis-
sion line rather than a simple R-C filter. The MAX4588’s
construction allows an exceptional 180MHz bandwidth
when the switches are on.
Typical attenuation in 75
systems is 2.5dB and is rea-
sonably flat up to 50MHz. Higher-impedance circuits
show even lower attenuation (and vice versa), but
slightly lower bandwidth due to the increased effect of
the internal and external capacitance and the switch’s
internal resistance.
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
______________________________________________________________________________________
13
A1
A2
A3
P1
N3
N1
V-
GND
INPUT
VCC
V+
COM_
NO_
N2
P2
NORMALLY OPEN SWITCH CONSTRUCTION
ESD DIODES
ON GND, NO_,
AND COM_
tCSS
CS
SCLK
DIN
DOUT
NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH tR AND tF < 10ns.
TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.
tDS
tDH
A0
A1
A2
DISABLE
tDO
tCH
tCL
tCSH
MAX4588
Figure 7. Serial Timing Diagram
Figure 8. T-Switch Construction
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