參數(shù)資料
型號: MAX4614CSD+T
廠商: Maxim Integrated Products
文件頁數(shù): 11/12頁
文件大?。?/td> 0K
描述: IC SWITCH QUAD SPST 14SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
功能: 開關(guān)
電路: 4 x SPST - NO
導(dǎo)通狀態(tài)電阻: 10 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2 V ~ 5.5 V
電流 - 電源: 1µA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
MAX4614/MAX4615/MAX4616
Low-Voltage, High-Speed, Quad, SPST
CMOS Analog Switches
8
_______________________________________________________________________________________
Applications Information
Power-Supply Sequencing and
Overvoltage Protection
Do not exceed the absolute maximum ratings because
stresses beyond the listed ratings may cause perma-
nent damage to the devices.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals or logic inputs, especially if the analog
or logic signals are not current limited. If this sequenc-
ing is not possible, and if the analog or logic inputs are
not current limited to 20mA, add a small-signal diode
(D1) as shown in Figure 1. If the analog signal can dip
below GND, add D2. Adding protection diodes
reduces the analog signal range to a diode drop (about
0.7V) below V+ (for D1), and to a diode drop above
ground (for D2). Leakage is unaffected by adding the
diodes. On-resistance increases by a small amount at
low supply voltages. Maximum supply voltage (V+)
must not exceed 6V.
Adding protection diodes causes the logic thresholds
to be shifted relative to the power-supply rails. This can
be significant when low supply voltages (+5V or less)
are used. With a +5V supply, TTL compatibility is not
guaranteed when protection diodes are added. Driving
IN1 and IN2 all the way to the supply rails (i.e., to a
diode drop higher than the V+ pin, or to a diode drop
lower than the GND pin) is always acceptable.
Protection diodes D1 and D2 also protect against some
overvoltage situations. With Figure 1’s circuit, if the sup-
ply voltage is below the absolute maximum rating, and
if a fault voltage up to the absolute maximum rating is
applied to an analog signal pin, no damage will result.
POSITIVE SUPPLY
COM_
NO_
Vg
V+
D1
D2
MAX4614
MAX4615
MAX4616
Figure 1. Overvoltage Protection Using Two External Blocking
Diodes
tR < 20ns
tF < 20ns
50%
0
LOGIC
INPUT
RL
300
NO_, NC_
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VCOM
(
RL
)
RL + RON
SWITCH
INPUT
IN_
VINH
tOFF
0
COM_
SWITCH
OUTPUT
0.9
V0UT
0.9
VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
V+
CL
35pF
V+
VOUT
VCOM_
MAX4614
MAX4615
MAX4616
Figure 2. Switching Time
______________________________________________Test Circuits/Timing Diagrams
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