參數(shù)資料
型號(hào): MAX4686
廠商: Maxim Integrated Products, Inc.
英文描述: 2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package
中文描述: 2.5Ω、低電壓、SPST/SPDT模擬開關(guān),UCSP封裝
文件頁數(shù): 6/8頁
文件大?。?/td> 183K
代理商: MAX4686
Proper power-supply sequencing is recommended for all
CMOS devices. Always apply V+ before applying analog
signals, especially if the analog signal is not current limit-
ed. If this sequencing is not possible, and if the analog
inputs are not current limited to <20mA, add a small-sig-
nal diode (D1) as shown in Figure 1. Adding a protection
diode reduces the analog range to a diode drop (about
0.7V) below V+ (for D1). R
ON
increases slightly at low
supply voltages. Maximum supply voltage (V+) must not
exceed +6V.Protection diode D1 also protects against
some overvoltage situations. No damage will result on
Figure 1
s circuit if the supply voltage is below the
absolute maximum rating and if a fault voltage up to the
absolute maximum rating is applied to an analog signal
pin.
UCSP Package Consideration
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Ultra-Chip-Board-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia-
bility tests. CSP reliability is integrally linked to the user
s
assembly methods, circuit board material, and usage
environment. The user should closely review these areas
when considering use of a CSP package. Performance
through Operating Life Test and Moisture Resistance
remains uncompromised as it is primarily determined by
the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a CSP package. CSPs are attached through
direct solder contact to the user
s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be considered.
Information on Maxim
s qualification plan, test data, and
recommendations are detailed in the UCSP application
note, which can be found on Maxim
s website at
www.maxim-ic.com.
M
2.5
, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
6
_______________________________________________________________________________________
Test Circuits/Timing Diagrams
tr < 5ns
tf < 5ns
50%
0
LOGIC
INPUT
R
L
50
COM_
GND
IN_
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
OUT
= V
N_
(
R
L
)
V
L
+ R
ON
V
IN_
V+
t
OFF
0
NO_
OR NC
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
C
35pF
V+
V
OUT
MAX4686
MAX4687
MAX4688
50%
V+
0
LOGIC
INPUT
V
OUT
0.9 x V
OUT
t
D
LOGIC
INPUT
R
L
300
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
IN_
NC_
V
OUT
V+
V+
C
35pF
V
N_
COM_
MAX4688
tr < 5ns
t
f
< 5ns
Figure 2. Switching Time
Figure 3. Break-Before-Make Interval (MAX4688 only)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX4686EBT 制造商:Maxim Integrated Products 功能描述:- Rail/Tube
MAX4686EBT+ 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻(最大值):0.1 Ohms 切換電壓(最大): 開啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16
MAX4686EBT+T 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻(最大值):0.1 Ohms 切換電壓(最大): 開啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16
MAX4686EBT-T 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻(最大值):0.1 Ohms 切換電壓(最大): 開啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16
MAX4687EBT 制造商:Maxim Integrated Products 功能描述:- Rail/Tube