, Dual SPST, CMOS Analog Switches 8 ______________________________________" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MAX4690CPE+
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 11/12闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC SWITCH DUAL SPST 16DIP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 25
鍔熻兘锛� 闁嬮棞(gu膩n)
闆昏矾锛� 2 x SPST - NO
灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆锛� 1.25 姝愬
闆诲闆绘簮锛� 鍠�/闆欓浕婧�
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 4.5 V ~ 36 V锛�±4.5 V ~ 20 V
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 閫氬瓟
灏佽/澶栨锛� 16-DIP锛�0.300"锛�7.62mm锛�
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 16-PDIP
鍖呰锛� 绠′欢
MAX4680/MAX4690/MAX4700
1.25
, Dual SPST,
CMOS Analog Switches
8
_______________________________________________________________________________________
___________Applications Information
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings can cause permanent damage to the devices.
Always sequence V+ on first, then V-, followed by the
logic inputs, NO, or COM. If power-supply sequencing
is not possible, add two small signal diodes (D1, D2) in
series with the supply pins and a Schottky diode
between V+ and VL for overvoltage protection (Figure
1). Adding diodes reduces the analog signal range to
one diode drop below V+ and one diode drop above V-,
but does not affect the devices鈥� low switch resistance
and low-leakage characteristics. Device operation is
unchanged, and the difference between V+ and V-
should not exceed 44V.
COM_
VL
V-
V+
NO_
* INTERNAL PROTECTION DIODES
D2
D1
-15V
+15V
MAX4680
MAX4690
MAX4700
*
tr < 20ns
tf < 20ns
50%
0
LOGIC
INPUT
V-
-15V
RL
100
NO_
OR NC_
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
SWITCH
INPUT
IN_
+3V
tOFF
0
COM_
SWITCH
OUTPUT
0.9V0
tON
VO
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
VL
V+
CL
35pF
+5V
+15V
VO
VCOM_
0
REPEAT TEST FOR EACH SWITCH. FOR LOAD
CONDITIONS, SEE
Electrical Characteristics.
MAX4680
MAX4690
MAX4700
VO = VCOM
(
)
RL + RON
RL
Figure 1. Overvoltage Protection Using External Blocking Diodes
Figure 2. Switching-Time Test Circuit
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
VI-25P-IY-S CONVERTER MOD DC/DC 13.8V 50W
MAX4603EWE+ IC SWITCH QUAD SPST 16SOIC
IH5142CPE+ IC SWITCH SPDT 16DIP
VI-25M-IY-S CONVERTER MOD DC/DC 10V 50W
MAX4509ESE+ IC MULTIPLEXER DUAL 4X1 16SOIC
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MAX4690CPE+ 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC 1.25Ohm SPST/SPDT Analog Switch RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅�(sh铆)闁擄紙鏈€澶у€硷級: 闂�(gu膩n)闁夋檪(sh铆)闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16
MAX4690CWE 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅�(sh铆)闁擄紙鏈€澶у€硷級: 闂�(gu膩n)闁夋檪(sh铆)闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16
MAX4690CWE+ 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC 1.25Ohm SPST/SPDT Analog Switch RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅�(sh铆)闁擄紙鏈€澶у€硷級: 闂�(gu膩n)闁夋檪(sh铆)闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16
MAX4690CWE+T 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC 1.25Ohm SPST/SPDT Analog Switch RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅�(sh铆)闁擄紙鏈€澶у€硷級: 闂�(gu膩n)闁夋檪(sh铆)闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16
MAX4690CWE-T 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅�(sh铆)闁擄紙鏈€澶у€硷級: 闂�(gu膩n)闁夋檪(sh铆)闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16