Ω, Quad SPDT Switches in UCSP/QFN 4 _____________________" />
參數(shù)資料
型號(hào)： MAX4754AETE+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 10/15頁(yè)
文件大?。?/td> 0K
描述： IC SWITCH QUAD SPDT 16TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 75
功能： 開(kāi)關(guān)
電路： 4 x SPDT
導(dǎo)通狀態(tài)電阻： 850 毫歐
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 1.8 V ~ 5.5 V
電流 - 電源： 6.5µA
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 16-WQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 16-TQFN-EP（4x4）
包裝： 管件
MAX4754/MAX4754A/MAX4755/MAX4756/MAX4756A
0.5
Ω, Quad SPDT Switches in UCSP/QFN
4
_______________________________________________________________________________________
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: UCSP parts are 100% tested at +25°C and limits across the full temperature range are guaranteed by correlation and
design. TQFN parts are 100% tested at +85°C and limits across the full temperature range are guaranteed by correlation
and design.
Note 4: RON and
ΔRON matching specifications are guaranteed by design and correlation.
Note 5:
ΔRON = RON(MAX) - RON(MIN).
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7: Guaranteed by design, not production tested.
Note 8: Off-Isolation = 20log10 [VCOM / (VNO or VNC)], VCOM = output, VNO or VNC = input to off switch.
Note 9: Between any two switches.
ELECTRICAL CHARACTERISTICS (continued)
(V+ = +2.7V to +5.25V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at +3V and TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
Total Harmonic
Distortion
THD
f = 20Hz to 20kHz, 1VP-P,
RL = 32
Ω, VDC = V+/2
+25°C
0.035
%
NO_, NC_ Off-
Capacitance
CNO_(OFF),
CNC_(OFF)
VNO, VNC_ = GND,
f = 1MHz (Figure 5)
+25°C
180
pF
COM_ Off-Capacitance
CCOM_(OFF) VCOM_ = GND, f = 1MHz (Figure 5)
+25°C
300
pF
COM_ On-Capacitance
C(ON)
VCOM_ = GND, f = 1MHz (Figure 5)
+25°C
400
pF
DIGITAL I/O (IN_,
EN)
V+ = 2.7V to 3.6V,
MAX4754/MAX4755/MAX4756
TMIN to
TMAX
1.4
V+ = 2.7V to 5.25V,
MAX4754A/MAX4756A
TMIN to
TMAX
1.4
Input Logic-High
VIH
V+ = 3.6V to 5.25V,
MAX4754/MAX4755/MAX4756
TMIN to
TMAX
2.0
V
V+ = 2.7V to 3.6V,
MAX4754/MAX4755/MAX4756
TMIN to
TMAX
0.5
V+ = 2.7V to 5.25V,
MAX4754A/MAX4756A
TMIN to
TMAX
0.5
Input Logic-Low
VIL
V+ = 3.6V to 5.25V,
MAX4754/MAX4755/MAX4756
TMIN to
TMAX
0.6
V
Input Leakage Current
IIN
VIN = 0V or V+
TMIN to
TMAX
1A
POWER SUPPLY
Power-Supply Range
V+
TMIN to
TMAX
1.8
5.5
V
+25°C
0.2
V+ = 5.5V, VIN_ = 0V or V+,
MAX4754/MAX4754A/MAX4755/MAX4756/
MAX4756A
TMIN to
TMAX
2
A
+25°C
6.5
Power-Supply Current
I+
V+ = 5.5V, VIN_ = 0.5V or 1.4V,
MAX4754A/MAX4756A
TMIN to
TMAX
12
A
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