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參數(shù)資料
| 型號： | MAX4800ACXZ+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH OCTAL SPST 26CSBGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 216 |
| 功能： | 開關(guān) |
| 電路： | 8 x SPST - NO |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 6 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-LFBGA，CSBGA |
| 供應(yīng)商設(shè)備封裝： | 72-CSBGA（6.0x5.3） |
| 包裝： | 管件 |
MAX4800A/MAX4802A
Low-Charge-Injection, 8-Channel, High-Voltage
Analog Switches with 20MHz Serial Interface
10
______________________________________________________________________________________
The VPP and VNN high-voltage supplies are not
required to be symmetrical, but the voltage difference
VPP - VNN must not exceed 200V.
Bleed Resistors (MAX4802A)
The MAX4802A features integrated 35k
Ω bleed resis-
tors to discharge capacitive loads such as piezoelec-
tric transducers. Each analog-switch terminal is
connected to RGND with a bleed resistor.
Serial Interface
The devices are controlled by a serial interface with an
8-bit serial shift register and transparent latch. Each of
the eight data bits controls a single analog switch (see
Table 1). Data on DIN is clocked with the most signifi-
cant bit (MSB) first into the shift register on the rising
edge of CLK. Data is clocked out of the shift register
onto DOUT on the rising edge of CLK. DOUT reflects
the status of DIN, delayed by eight clock cycles (see
Figures 1 and 2).
Latch Enable (
LE)
Drive LE logic-low to change the contents of the latch
and update the state of the high-voltage switches
(Figure 2). Drive LE logic-high to freeze the contents of
the latch and prevent changes to the switch states. To
reduce noise due to clock feedthrough, drive LE logic-
high while data is clocked into the shift register. After
the data shift register is loaded with valid data, pulse
LE logic-low to load the contents of the shift register
into the latch.
Latch Clear (CLR)
The devices feature a latch clear input. Drive CLR
logic-high to reset the contents of the latch to zero and
open all switches. CLR does not affect the contents of
the data shift register. Pulse LE logic-low to reload the
contents of the shift register into the latch.
Power-On Reset
The devices feature a power-on reset circuit to ensure
all switches are open at power-on. The internal 8-bit ser-
ial shift register and latch are set to zero on power-up.
LE
CLK
DOUT
DATA FROM PREVIOUS DATA BYTE POWER-UP DEFAULT: D7–D0 = 0
D7
D6
D5
D4
D3
D2
D1
D0
D7
DIN
D7
D6
D5
D4
D3
D2
D1
D0
MSB
LSB
Figure 2. Latch-Enable Interface Timing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX4800ACXZ+ | 功能描述:模擬開關(guān) IC 8Ch SPST 20MHz SPI Analog Switch RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4800ACXZ+T | 功能描述:模擬開關(guān) IC 8Ch SPST 20MHz SPI Analog Switch RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4800CCM | 功能描述:模擬開關(guān) IC RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4800CCM+ | 功能描述:模擬開關(guān) IC Low-Charge Injection 8-Channel High-Voltage Analog Switches RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| MAX4800CCM+T | 功能描述:模擬開關(guān) IC Low-Charge Injection 8-Channel High-Voltage Analog Switches RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:2 開關(guān)配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關(guān)閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
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