參數(shù)資料
型號: MAX4925ELT+T
廠商: Maxim Integrated Products
文件頁數(shù): 5/7頁
文件大小: 0K
描述: IC CTLR OVP W/EXT PFET 6UDFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
類型: 過壓保護(hù)控制器
應(yīng)用: 手機(jī),數(shù)碼相機(jī),媒體播放器
安裝類型: 表面貼裝
封裝/外殼: 6-WFDFN
供應(yīng)商設(shè)備封裝: 6-uDFN(1.5x1.0)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MAX4925ELT+TDKR
MAX4923–MAX4926
Overvoltage Protectors with
External pFET
_______________________________________________________________________________________
5
Detailed Description
The MAX4923–MAX4926 overvoltage protection
controllers protect low-voltage systems against high-
voltage faults of up to +28V when used with a -30V
pFET. When the input voltage exceeds the OVLO
threshold, these devices turn off the external pFET to
prevent damage to protected components.
The typical overvoltage trip level is set to 7.18V
(MAX4923), 6.16V (MAX4924), 5.65V (MAX4925), and
4.46V (MAX4926). When the supply drops below the
UVLO threshold, the devices turn off the external pFET.
IN is ESD protected to +15kV (Human Body Model) when
bypassed with a 1F ceramic capacitor to ground.
Undervoltage Lockout (UVLO)
The MAX4923–MAX4926 have a fixed 2.44V (typ)
UVLO level. When VIN is less than VUVLO, GATE is high
and FLAG is high.
Overvoltage Lockout (OVLO)
The MAX4923 has a 7.18V (typ) OVLO; the MAX4924
has a 6.16V (typ) OVLO; the MAX4925 has a 5.65V
(typ) OVLO; and the MAX4926 has a 4.46V (typ) OVLO.
When VIN is greater than VOVLO, GATE is high and
FLAG is high.
FLAG Output
The open-drain FLAG output is used to signal to the
host system that there is a fault with the input voltage.
FLAG goes high during an overvoltage or undervoltage
fault. Connect a pullup resistor from FLAG to the logic
I/O voltage of the host system.
Device Operation
The MAX4923–MAX4926 have an on-board state
machine to control device operation. A flowchart is
shown in Figure 2. At initial power up, if VIN < VUVLO or
if VIN > VOVLO, both GATE and FLAG are high. When
VUVLO < VIN < VOVLO, an internal timer starts counting
and the device enters its on state after a 20ms delay. At
any time if VIN drops below VUVLO or above VOVLO,
both GATE and FLAG transition high.
Application Information
MAX4926 Application
In a typical application for the MAX4926, an external
adapter with built-in battery charger is connected to IN
and a battery is connected to the drain of the external
FET. When the adapter is unplugged, IN is directly con-
nected to the battery through the external FET. Since
the battery voltage is typically greater than VUVLO, the
GATE voltage stays low and the device remains pow-
ered by the battery.
MOSFET Selection
The MAX4923–MAX4926 are designed for use with
either a single pFET or dual pFETs in parallel.
MOSFETs with RDS(ON) specified for a VGS of -4.5V are
recommended. For input supplies near the UVLO maxi-
mum of 2.5V, use a MOSFET specified for a lower VGS
voltage. Also, the VDS must be -30V and the VGS (max)
must be higher than the VOVLO (max) for the MOSFET
to withstand the full +28V input range of the
MAX4923–MAX4926.
TIME STARTS
COUNTING
STANDBY
GATE = HIGH
FLAG = HIGH
ON
GATE = LOW
FLAG = LOW
VIN > VOVLO
VIN < VUVLO
t = 20ms
VUVLO < VIN < VOVLO
Figure 2. State Machine
MAX4926
GATE
VI0
IN
FLAG
GND
INPUT
3
2
4
1
SYSTEM
LOADS
OUTPUT
LITHIUM ION
BATTERY
+
-
P
ADAPTER WITH
BUILT-IN
BATTERY
CHARGER
Figure 3. MAX4926 Typical Operating Circuit
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