參數(shù)資料
型號: MAX504CSD+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/16頁
文件大?。?/td> 0K
描述: IC DAC 10BIT VOLT OUT 14-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時間: 25µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
MAX504/MAX515
Daisy-Chaining Devices
The serial output, DOUT, allows cascading of two or more
DACs. The data at DIN appears at DOUT, delayed by 16
clock cycles plus one clock width. For low power, DOUT is
a CMOS output that does not require an external pull-up
resistor. DOUT does not go into a high-impedance state
when CS is high. DOUT changes on SCLK’s falling edge
when CS is low. When CS is high, DOUT remains in the
state of the last data bit.
Any number of MAX504/MAX515 DACs can be daisy-
chained by connecting the DOUT of one device to the DIN
of the next device in the chain. For proper timing, ensure
that tCL (SCLK low) is greater than tDO + tDS.
Unipolar Configuration
The MAX504 is configured for a gain of 1 (0V to VREFIN
unipolar output) by connecting BIPOFF and RFB to VOUT
(Figure 6). The converter operates from either single or
dual supplies in this configuration. See Table 1 for the
DAC-latch contents (input) vs. the analog VOUT (output).
In this range, 1LSB = VREFIN (2 -10), where VREF is the
voltage on REFIN.
A gain of 2 (0V to 2VREFIN unipolar output) is set up by
connecting BIPOFF to AGND and RFB to VOUT (Figure
7). Table 2 shows the DAC-latch contents vs. VOUT. The
MAX504 operates from either single or dual supplies in
this mode. In this range,
1LSB = (2)(VREFIN)(2 -10) = (VREFIN)(2 -9).
The MAX515 is internally configured for unipolar gain of
2 operation.
Bipolar Configuration
A bipolar range is set up by connecting BIPOFF to
REFIN and RFB to VOUT, and operating from dual
(±5V) supplies (Figure 8). Table 3 shows the DAC-latch
contents (input) vs. VOUT (output). In this range,
1LSB = VREFIN (2 -9).
Four-Quadrant Multiplication
The MAX504 can be used as a four-quadrant multiplier
by connecting BIPOFF to REFIN and RFB to VOUT, and
using (1) an offset binary digital code, (2) bipolar power
supplies, and (3) a bipolar analog input at REFIN within
the range VSS + 2V to VDD - 2V, as shown in Figure 9.
In general, a 10-bit DAC’s output is (D)(VREFIN)(G),
where “G” is the gain (1 or 2) and “D” is the binary rep-
resentation of the digital input divided by 210 or 1,024.
This formula is precise for unipolar operation. However,
for bipolar, offset binary operation, the MSB is really a
polarity bit. No resolution is lost because the number of
steps is the same. The output voltage, however, has
been shifted from a range of, for example, 0V to 4.096V
(G = 2) to a range of -2.048V to +2.048V.
Keep in mind that when using the DAC as a four-quad-
rant multiplier, the scale is skewed. Negative full scale
is -VREFIN, while positive full scale is +VREFIN - 1LSB.
5V, Low-Power, Voltage-Output,
Serial 10-Bit DACs
10
______________________________________________________________________________________
MAX504
CONNECT BIPOFF
TO VOUT FOR G=1,
TO AGND FOR G=2,
OR TO REFIN FOR
BIPOLAR GAIN
INVERTED
R-2R DAC
DIN
DOUT
SCLK
CS
CLR
2.048V
REFIN
REFOUT
AGND DGND
VDD VSS
33
F
0.1
F
0.1
F
2R
BIPOFF
RFB
VOUT
+5V
0V to -5V
MAX515
INVERTED
R-2R DAC
DIN
DOUT
SCLK
CS
REFIN
AGND
VDD
VOUT
MAX515
ONLY
0.1
F
2R
+5V
Figure 3a. MAX504 Typical Operating Circuit
Figure 3b. MAX515 Typical Operating Circuit
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