參數(shù)資料
型號(hào): MAX5138EVKIT+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 12/17頁(yè)
文件大?。?/td> 0K
描述: EVALUATION KIT FOR MAX5138
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 1
位數(shù): 16
數(shù)據(jù)接口: 串行
設(shè)置時(shí)間: 5µs
DAC 型: 電壓
工作溫度: -40°C ~ 105°C
已供物品: 板,纜線,CD
已用 IC / 零件: MAX5138
Low-Power, Single, 16-/12-Bit,
Buffered Voltage-Output DACs
4
Maxim Integrated
MAX5138/MAX5139
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = 2.7V to 5.25V, VDVDD = 2.7V to 5.25V, VAVDD
≥ VDVDD, VAGND = 0V, VREFI = VAVDD - 0.25V, COUT = 200pF, ROUT = 10kΩ,
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS (Note 7)
Analog Supply Voltage Range
AVDD
2.7
5.25
V
Digital Supply Voltage Range
DVDD
2.7
VAVDD
V
IAVDD
1
1.6
mA
Supply Current
IDVDD
No load, all digital inputs at 0V or VDVDD
1
10
μA
IAVPD
0.2
2
Power-Down Supply Current
IDVPD
No load, all digital inputs at 0V or VDVDD
0.1
2
μA
TIMING CHARACTERISTICS (Note 8) (Figure 1)
Serial-Clock Frequency
fSCLK
0
30
MHz
SCLK Pulse-Width High
tCH
13
ns
SCLK Pulse-Width Low
tCL
13
ns
CS Fall-to-SCLK Fall Setup Time
tCSS
8
ns
SCLK Fall-to
CS-Rise Hold Time
tCSH
5
ns
DIN-to-SCLK Fall Setup Time
tDS
10
ns
DIN-to-SCLK Fall Hold Time
tDH
2
ns
SCLK Fall to
READY Transition
tSRL
(Note 9)
30
ns
CS Pulse-Width High
tCSW
33
ns
LDAC Pulse Width
tLDACPWL
33
ns
Note 1: Static accuracy tested without load.
Note 2: Linearity is tested within 20mV of AGND and AVDD, allowing for gain and offset error.
Note 3: Codes above 2047 are guaranteed to be within ±9 LSB.
Note 4: Gain and offset tested within 100mV of AGND and AVDD.
Note 5: Guaranteed by design.
Note 6: Device draws current in excess of the specified supply current when a digital input is driven with a voltage of VVI < VDVDD -
0.6V or VVI > 0.5V. At VVI = 2.2V with VDVDD = 5.25V, this current can be as high as 2mA. The SPI inputs are CMOS-input-level
compatible. The 30MHz clock frequency cannot be guaranteed for a minimum signal swing.
Note 7: Excess current from AVDD is 10mA when powered without DVDD. Excess current from DVDD is 1mA when powered without
AVDD.
Note 8: All timing specifications are with respect to the digital input and output thresholds.
Note 9: Maximum daisy-chain clock frequency is limited to 25MHz.
C7
C6
C5
D2
D1
D0
X
COMMAND EXECUTED ON
24th FALLING EDGE OF SCLK
CS
SCLK
DIN
X = DON'T CARE.
tCH
tCL
tCSS
tDH
tCSH
tDS
tSRL
READY
X
tCSW
D3
Figure 1. Serial-Interface Timing Diagram
相關(guān)PDF資料
PDF描述
MAX5216EVKIT+ KIT EVAL FOR MAX5214/MAX5216
EVAL-AD7265EDZ BOARD EVAL FOR AD7265 A/D CONV
GCM22DCSD CONN EDGECARD 44POS DIP .156 SLD
MAX5258EVKIT+ KIT EVAL FOR MAX5258
MAX54XEVKIT# BOARD EVAL DAC MAX541 MAX542
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX5138EVKIT+ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 MAX5138/39 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類(lèi)型:ADC 工具用于評(píng)估:ADS130E08 接口類(lèi)型:SPI 工作電源電壓:- 6 V to + 6 V
MAX5139 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Low-Power, Single, 16-/12-Bit, Buffered Voltage-Output DACs
MAX5139GTE+ 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5139GTE+T 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX513C/D 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Low-Cost, Triple, 8-Bit Voltage-Output DACs with Serial Interface