參數(shù)資料
型號: MAX5230BEEE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: 3V/5V, 12-Bit, Serial Voltage-Output Dual DACs with Internal Reference
中文描述: SERIAL INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDSO16
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-16
文件頁數(shù): 4/18頁
文件大?。?/td> 974K
代理商: MAX5230BEEE
M
3V/5V, 12-Bit, Serial Voltage-Output Dual DACs
with Internal Reference
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS
MAX5230 (continued)
(V
DD
= +2.7V to +3.6V, OS_ = AGND = DGND = 0, R
L
= 5k
, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values
are at T
A
= +25
°
C.)
PARAMETER
SYMBOL
V
OUT
/I
OUT
CONDITIONS
MIN
TYP
0.1
4
MAX
2
UNITS
μV/μA
mA
Reference External Load Regulation
Reference Short-Circuit Current
DIGITAL INPUTS
Input High Voltage
Input Low Voltage
Input Hysteresis
Input Leakage Current
Input Capacitance
DIGITAL OUTPUTS
Output High Voltage
Output Low Voltage
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate
0
I
OUT
100μA (sourcing)
V
IH
V
IL
V
HYS
I
IN
C
IN
0.7 x V
DD
V
V
0.3 x V
DD
200
mV
μA
pF
Digital inputs = 0 or V
DD
±
1
8
V
OH
V
OL
I
SOURCE
= 2mA
I
SINK
= 2mA
2.3
V
V
0.25
SR
0.6
V/μs
Voltage-Output Settling Time
To
±
0.5 LSB, V
STEP
= ±2V
(V
DD
- 0.25V)
V
OUT
0.25V
10
μs
Output-Voltage Swing (Note 5)
OS_ Input Resistance
0 to V
DD
121
V
R
OS
83
k
Time Required for Output to Settle After
Turning on V
DD
(Note 6)
95
400
μs
Time Required for Output to Settle After
Exiting Full Power-Down (Note 6)
95
400
μs
Time Required for Output to Settle After
Exiting DAC Power-Down (Note 6)
12
160
μs
Digital Feedthrough
CS
=V
DD
, f
SCLK
= 100kHz,
V
SCLK
= 3V
P-P
5
nV-s
Major-Carry Glitch Energy
90
nV-s
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