參數(shù)資料
型號(hào)： MAX5302CUA+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 2/12頁(yè)
文件大小： 0K
描述： IC DAC 12BIT LP SERIAL 8-UMAX
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
設(shè)置時(shí)間： 14µs
位數(shù)： 12
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 8-uMAX
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 1 電壓，單極；1 電壓，雙極
采樣率（每秒）： *
MAX5302
Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
10
______________________________________________________________________________________
DAC
VOUT
V+
+5V
V-
R1 = R2 = 10k
±0.1%
REF
R1
R2
FB
OUT
MAX5302
VDD
GND
Figure 10. Bipolar Output Circuit
Digitally Programmable Current Source
The circuit of Figure 12 places an NPN transistor (2N3904
or similar) within the op amp feedback loop to implement
a digitally programmable, unidirectional current source.
The output current is calculated with the following
equation:
IOUT = (VREF / R) (NB / 4096)
where NB is the numeric value of the DAC’s binary input
code, and R is the sense resistor shown in Figure 12.
Power-Supply Considerations
On power-up, the input and DAC registers are cleared
(set to zero code).
For rated MAX5302 performance, VREF must be at least
1.4V below VDD. Bypass VDD with a 4.7F capacitor in
parallel with a 0.1F capacitor to GND. Use short lead
lengths and place the bypass capacitors as close to
the supply pins as possible.
Grounding and Layout Considerations
Digital or AC transient signals on GND can create noise
at the analog output. Connect GND to the highest-quality
ground available.
Good PC board ground layout minimizes crosstalk
between the DAC output, reference input, and digital
input. Reduce crosstalk by keeping analog lines away
from digital lines. Wire-wrapped boards are not recom-
mended.
Table 3. Bipolar Code Table
MAX5302
DAC
REF
OUT
10k
GND
+5V
VDD
FB
Figure 9. Unipolar Rail-to-Rail Output Circuit
ANALOG OUTPUT
1111 1111 1111 (0)
1000 0000 0001 (0)
DAC CONTENTS
MSB
LSB
1000 0000 0000 (0)
0V
0111 1111 1111 (0)
0000 0000 0000 (0)
0000 0000 0001 (0)
+V
2047
2048
REF
+V
1
2048
REF
-V
1
2048
REF
-V
2047
2048
REF
-V
2048
-V
REF
=
Note: ( ) are for sub-bit.
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