參數(shù)資料
型號(hào)： MAX532ACWE+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 13/16頁(yè)
文件大小： 0K
描述： IC MDAC 12BIT DUAL SER 16-SOIC
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1,000
設(shè)置時(shí)間： 2.5µs
位數(shù)： 12
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 雙 ±
功率耗散（最大）： 762mW
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC W
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電壓，單極；2 電壓，雙極
采樣率（每秒）： *
MAX532
Dual, Serial-Input,
Voltage-Output, 12-Bit MDAC
6
_______________________________________________________________________________________
______________________________________________________________Pin Description
A
AGNDA
A = VOUTA, 5V/div
TIMEBASE = 2
s/div
VREFA = ±10V SQUARE WAVE
LARGE-SIGNAL PULSE RESPONSE
____________________________Typical Operating Characteristics (continued)
(VDD = 15V, VSS = -15V, RL = 2k, CL = 100pF, unless otherwise noted.)
PIN
NAME
FUNCTION
1
RFBA
Feedback Resistor for DACA
2
VREFA
Reference Input for DACA
3
VOUTA
Voltage Output for DACA
4
AGNDA
Analog Ground for DACA
5
AGNDB
Analog Ground for DACB
6
VOUTB
Voltage Output for DACB
7
VREFB
Reference Input for DACB
8
RFBB
Feedback Resistor for DACB
9
VSS
Negative Supply Voltage
10
DGND
Digital Ground
11
SCLK
Serial Clock Input
12
DOUT
Serial Data Output. Open-drain N-channel MOSFET output: requires external pull-up resis-
tor. Data on DOUT changes on the falling edge of SCLK. Serial output data is delayed 24
clock cycles from DIN.
13
DIN
Serial Data Input. CMOS- and TTL-compatible input. Data is clocked into DIN on the rising
edge of SCLK.
CS must be low for data to be clocked in.
16
VDD
Positive Supply Voltage
15
LDAC
Asynchronous Load DAC Input, active low. DAC latches are updated when
CS is high and
LDAC is low.
14
CS
Chip-Select Input, active low. Data is shifted in and out when
CS is low. DAC latches are
updated when
CS is high and LDAC is low.
A
AGNDA
A = VOUTA, 50mV/div
TIMEBASE = 2
s/div
VREFA = ±100mV SQUARE WAVE
SMALL-SIGNAL PULSE RESPONSE
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