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參數(shù)資料
| 型號： | MAX5365EUT+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 6BIT LP 3WIRE SER SOT23-6 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時間： | 20µs |
| 位數(shù)： | 6 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 696mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-6 |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極 |
| 采樣率（每秒）： | * |
input register, it transfers its contents to the DAC latch
on CS’s low-to-high transition (Figure 3). Note that if CS
is not kept low during the entire 16 SCLK cycles, data
will be corrupted. In this case, reload the DAC latch
with a new 16-bit word. The serial clock (SCLK) can
idle either high or low between transitions. Figure 4
shows the complete 3-wire serial interface transmission.
Table 3 lists serial interface mapping.
Applications Information
Device Powered by an External Reference
Since the MAX5365 generates an output voltage pro-
portional to VDD, a noisy power supply will affect the
accuracy of the on-board reference, thereby affecting
the overall accuracy of the DAC. The circuit in Figure 5
rejects this power-supply noise by powering the device
directly with a precision voltage reference, improving
overall system accuracy. The MAX6103 (+3V, 75ppm)
or the MAX6105 (+5V, 75ppm) precision voltage refer-
ences are ideal choices due to the low power require-
ments of the MAX5365. This solution is also useful
when the required full-scale output voltage is different
from the available supply voltages.
Digital Inputs and Interface Logic
The digital interface for the 6-bit DAC is based on a
3-wire standard that is compatible with SPI, QSPI, and
MICROWIRE interfaces. The three digital inputs (CS, DIN,
and SCLK) load the digital input serially into the DAC.
All of the digital inputs include Schmitt-trigger buffers to
accept slow-transition interfaces. This means that opto-
couplers can interface directly to the MAX5363/
MAX5364/MAX5365 without additional external logic.
The digital inputs are compatible with CMOS logic levels
and can be driven with voltages up to +5.5V regardless
of the supply voltage.
Power-Supply Bypassing and Layout
Careful PC board layout is important for best system
performance. To reduce crosstalk and noise injection,
keep analog and digital signals separate. To ensure
that the ground return from GND to the supply ground
is short and low impedance, a ground plane is recom-
mended. Bypass VDD with a 0.1F to ground as close
as possible to the device. If the supply is excessively
noisy, connect a 10
resistor in series with the supply
and VDD and add additional capacitance.
MAX5363/MAX5364/MAX5365
Low-Cost, Low-Power, 6-Bit DACs with 3-Wire
Serial Interface in SOT23
_______________________________________________________________________________________
9
Table 3. Serial Interface Mapping
X = Don’t care
16-BIT SERIAL WORD
ANALOG
MSB
LSB
OUTPUT
FUNCTION
XX00
0000
XXXX
0V
Normal operation
XX00
1111
11XX
XXXX
VREF (63/64)
Normal operation
XX00
0000
01XX
XXXX
VREF (1/64)
Normal operation
XX00
1000
00XX
XXXX
VREF (32/64)
Normal operation
XX01
XXXX
0V
Shutdown,
1k
to GND
XX10
XXXX
0V
Shutdown,
100k
to GND
XX11
XXXX
0V
Shutdown,
1M
to GND
Table 2. Shutdown Modes
DAC CODE
[D13 AND D12]
MODE
OUTPUT RESISTANCE TO
GROUND (
)
MAXIMUM SUPPLY
CURRENT (
A)
01
Shutdown
1k
1
10
Shutdown
100k
1
11
Shutdown
1M
1
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