參數(shù)資料
型號: MAX5391NEVMINIQU+
廠商: Maxim Integrated Products
文件頁數(shù): 8/14頁
文件大?。?/td> 0K
描述: EVAL KIT MAX5391
標準包裝: 1
系列: *
Dual 256-Tap, Volatile, Low-Voltage
Linear Taper Digital Potentiometers
MAX5391/MAX5393
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +1.7V to +5.5V, VH_ = VDD, VL_ = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +1.8V,
TA = +25NC.) (Note 1)
Note 1: All devices are 100% production tested at TA = +25NC. Specifications over temperature limits are guaranteed by design
and characterization.
Note 2: DNL and INL are measured with the potentiometer configured as a voltage-divider (Figure 1) with H_ = VDD and L_ =
GND. The wiper terminal is unloaded and measured with a high-input-impedance voltmeter.
Note 3: R-DNL and R-INL are measured with the potentiometer configured as a variable resistor (Figure 1). DNL and INL are
measured with the potentiometer configured as a variable resistor. H_ is unconnected and L_ = GND. For VDD = +5V, the
wiper terminal is driven with a source current of 400FA for the 10kI configuration, 80FA for the 50kI configuration, and
40FA for the 100kI configuration. For VDD = +1.7V, the wiper terminal is driven with a source current of 150FA for the
10kI configuration, 30FA for the 50kI configuration, and 15FA for the 100kI configuration.
Note 4: The wiper resistance is the value measured by injecting the currents given in Note 3 into W_ with L_ = GND.
RW_ = (VW_ - VH_)/IW_.
Note 5: Drive HA with a 1kHz GND to VDD amplitude tone. LA = LB = GND. No load. WB is at midscale with a 10pF load.
Measure WB.
Note 6: The wiper-settling time is the worst-case 0 to 50% rise time, measured between tap 0 and tap 127. H_ = VDD, L_ = GND,
and the wiper terminal is loaded with 10pF capacitance to ground.
Note 7: Digital timing is guaranteed by design and characterization, not production tested.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Wiper Settling Time (Note 6)
tS
MAX5391L/MAX5393L
400
ns
MAX5391M/MAX5393M
1200
MAX5391N/MAX5393N
2200
Charge-Pump Feedthrough at W_
VRW
fCLK = 600kHz, COUT = 0nF
200
nVP-P
POWER SUPPLIES
Supply Voltage Range
VDD
1.7
5.5
V
Standby Current
VDD = 5.5V
27
F
A
VDD = 1.7V
12
DIGITAL INPUTS
Minimum Input High Voltage
VIH
VDD = 2.6V to 5.5V
70
% x VDD
VDD = 1.7V to 2.6V
75
Maximum Input Low Voltage
VIL
VDD = 2.6V to 5.5V
30
% x VDD
VDD = 1.7V to 2.6V
25
Input Leakage Current
-1
+1
F
A
Input Capacitance
5
pF
TIMING CHARACTERISTICS—SPI (Note 7)
SCLK Frequency
fMAX
10
MHz
SCLK Clock Period
tCP
100
ns
SCLK Pulse-Width High
tCH
40
ns
SCLK Pulse-Width Low
tCL
40
ns
CS Fall to SCK Rise Setup Time
tCSS
40
ns
SCLK Rise to CS Rise Hold Time
tCSH
0
ns
DIN Setup Time
tDS
40
ns
DIN Hold Time
tDH
0
ns
SCLK Rise to CS Fall Delay
tCS0
10
ns
SCLK Rise to SCLK Rise Hold Time
tCS1
40
ns
CS Pulse-Width High
tCSW
100
ns
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