參數(shù)資料
型號: MAX5392MAUE+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/16頁
文件大?。?/td> 0K
描述: IC DGTL POT 256POS 50K 16TSSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
接片: 256
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標準值 35 ppm/°C
存儲器類型: 易失
接口: I²C(設備位址)
電源電壓: 1.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 16-TSSOP
包裝: 帶卷 (TR)
Dual, 256-Tap, Volatile, Low-Voltage,
Linear Taper Digital Potentiometer
MAX5392
10 _____________________________________________________________________________________
Detailed Description
The MAX5392 dual, 256-tap, volatile, low-voltage linear
taper digital potentiometer offers three end-to-end resis-
tance values of 10kI, 50kI, and 100kI. The potenti-
ometer consists of 255 fixed resistors in series between
terminals H_ and L_. The potentiometer wiper, W_, is
programmable to access any one of the 256 tap points
on the resistor string.
The potentiometers are programmable independently of
each other. The MAX5392 features an I2C interface.
Charge Pump
TThe MAX5392 contains an internal charge pump that
guarantees the maximum wiper resistance, RWL, to be
less than 200 for supply voltages down to 1.7V. Pins
H_, W_, and L_ are still required to be less than VDD +
0.3V. A bypass input, BYP, is provided to allow addi-
tional filtering of the charge-pump output, further reduc-
ing clock feedthrough that can occur on H_, W_, or L_.
The nominal clock rate of the charge pump is 600kHz.
BYP should remain resistively unloaded as any addi-
tional load would increase clock feedthrough. See the
Charge-Pump Feedthrough at W_ vs. CBYP graph in the
Typical Operating Characteristics for CBYP sizing guide-
lines with respect to clock feedthrough to the wiper. The
value of CBYP does affect the startup time of the charge
pump; however, CBYP does not impact the ability to
communicate with the device, nor is there a minimum
CBYP requirement. The maximum wiper impedance
specification is not guaranteed until the charge pump is
fully settled. See the BYP Ramp Time vs. CBYP graph in
the Typical Operating Characteristics for CBYP impact on
charge-pump settling time.
I2C Digital Interface
The I2C interface contains a shift register that decodes
the command and address bytes, routing the data to the
appropriate control registers. Data written to a control
register immediately updates the wiper position. The
wipers A and B power up in midposition, D[7:0] = 80h.
Serial Addressing
The MAX5392 operates as a slave device that receives
data through an I2C/SMBusK-compatible 2-wire serial
interface. The interface uses a serial-data access line
(SDA) and a serial-clock line (SCL) to achieve bidirec-
tional communication between master(s) and slave(s).
A master, typically a microcontroller, initiates all data
transfers to the port and generates the SCL clock that
synchronizes the data transfer. See Figure 2. Connect a
pullup resistor, typically 4.7kI, between each of the SDA
and SCL lines to a voltage between VDD and 5.5V.
SMBus is a trademark of Intel Corp.
Figure 2. I2C Serial-Interface Timing Diagram
SDA
SCL
START
CONDITION
(S)
tLOW
tBUF
tHIGH
tHD:STA
tSU:DAT
tR
tF
tSU:STD
REPEATD
START CONDITION
(Sr)
ACKNOWLEDGE (A)
STOP CONDITION
(P)
START CONDITION
(S)
tHD:DAT
tSU:DTA
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