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參數(shù)資料
| 型號(hào)： | MAX5431CEUB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VOLTAGE DIVIDER PGA 10-UMAX |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 接片： | 4 |
| 電阻（歐姆）： | 57k |
| 電路數(shù)： | 1 |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | 2 輸入并口 |
| 電源電壓： | 12 V ~ 15 V，±12 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
Digital Interface Operation
The MAX5430/MAX5431 feature a simple two-bit paral-
lel programming interface. D1 and D0 program the gain
setting according to the Logic-Control Truth Table (see
Table 1). The digital interface is CMOS/TTL logic com-
patible.
Applications Information
Programmable-Gain Amplifier
The MAX5430/MAX5431 are ideally suited for high-pre-
cision PGA applications. The typical application circuit
of Figure 2 uses the MAX5431 with matching resistor to
compensate for voltage offset due to op amp input bias
currents. Use the MAX5430 with an ultra-low input bias
current op amp (see Figure 3).
Power Supplies and Bypassing
The MAX5430/MAX5431 operate from dual ±15V sup-
plies or a single 15V supply. For dual supplies, bypass
VDD and VSS with 0.1F ceramic capacitors to GND.
For single supply, connect VSS to GND and bypass
VDD with a 0.1F ceramic capacitor to GND.
Switching Time and Layout Concerns
The switching time of the MAX5430/MAX5431 depends
on the capacitive loading at W. For best performance,
reduce parasitic board capacitance by minimizing the
circuit board trace from W to the op amp inverting input,
and choose an op amp with low input capacitance.
MAX5430/MAX5431
±15V Digitally Programmable
Precision Voltage-Dividers for PGAs
6
_______________________________________________________________________________________
15V
MATCH_L
W
H
15V
MATCH_H
VSS
VDD
GND
L
MAX5431
VIN
VOUT
15V
W
H
15V
VSS
VDD
GND
L
MAX5430
VIN
VOUT
Figure 2. MAX5431 Typical Application Circuit PGA with Input
IBIAS Matching
Figure 3. Programmable-Gain Amplifier Using the MAX5430
1
2
8
7
SOT23
TOP VIEW
3
4
6
5
MAX5430
VDD
D0
VSS
L
H
W
D1
GND
Pin Configurations (continued)
Chip Information
TRANSISTOR COUNT: 121
PROCESS: CMOS
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