參數(shù)資料
型號(hào)： MAX5441-MAX5444
廠商： Maxim Integrated Products, Inc.
英文描述： +3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
中文描述： 枚3V / 5V的，串行輸入，電壓輸出，16位DAC
文件頁(yè)數(shù)： 3/12頁(yè)
文件大?。?/td> 385K
代理商： MAX5441-MAX5444
M
+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
_______________________________________________________________________________________
3
TIMING CHARACTERISTICS
(V
DD
= +2.7V to +3.3V (MA5443/MAX5444) , V
DD
= +4.5V to +5.5V (MAX5441/MAX5442), V
REF
= +2.5V, GND = 0, CMOS inputs,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25
°
C.) (Figure 1)
CONDITIONS
f
CLK
SCLK Frequency
SCLK Pulse Width High
Note 1:
Gain error tested at V
REF
= +2.0V, +2.5V, and +3.0V (MAX5443/MAX5444) or V
REF
= +2.0V, +2.5V, +3.0V, and +5.5V
(MAX5441/ MAX5442).
Note 2:
R
OUT
tolerance is typically ±20%.
Note 3:
Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance.
Note 4:
Reference input resistance is code-dependent, minimum at 8555hex in unipolar mode, 4555hex in bipolar mode.
Note 5:
Slew-rate value is measured from 10% to 90%.
Note 6:
Guaranteed by design. Not production tested.
Note 7:
Guaranteed by power-supply rejection test and
Timing Characteristics
.
All digital inputs at
V
DD
or GND
All digital inputs at V
DD
or GND
MAX5443/MAX5444
MAX5441/MAX5442
Code = 0000 hex, V
REF
= 1V
P-P
at 100kHz
Code = 0000 hex
Code = FFFF hex
(Note 6)
CONDITIONS
mW
0.36
0.60
PD
Power Dissipation
mA
0.12
0.20
I
DD
Positive Supply Current
V
2.7
4.5
3.6
5.5
V
DD
Positive Supply Range (Note 7)
V
0.15
V
H
Hysteresis Voltage
POWER SUPPLY
pF
3
10
C
IN
Input Capacitance
mV
P-P
dB
1
92
70
170
μA
±1
I
IN
Input Current
V
0.8
V
IL
Input Low Voltage
V
2.4
V
IH
Input High Voltage
Reference Feedthrough
Signal-to-Noise Ratio
SNR
pF
C
INREF
Reference Input Capacitance
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
(Note 6)
μs
20
V
DD
High to
CS
Low
(power-up delay)
ns
ns
ns
ns
ns
20
15
15
35
20
t
CL
t
CSS0
t
CSS1
t
CSH0
t
CSH1
SCLK Pulse Width Low
CS
Low to SCLK High Setup
CS
High to SCLK High Setup
SCLK High to
CS
Low Hold
SCLK High to
CS
High Hold
ns
20
t
CH
MHz
25
ns
20
t
CLW
CLR
Pulse Width Low
ns
0
t
DH
DIN to SCLK High Hold
ns
15
t
DS
DIN to SCLK High Setup
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
Code = FFFF hex
MHz
1
BW
Reference -3dB Bandwidth
DYNAMIC PERFORMANCE—REFERENCE SECTION
STATIC PERFORMANCE—DIGITAL INPUTS
MAX5441/MAX5442
MAX5443/MAX5444
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), V
REF
= +2.5V, C
L
= 10pF, GND = 0, R
L
=
∞
, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25
°
C.)
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