參數(shù)資料
型號(hào): MAX5480ACEE+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 4/6頁(yè)
文件大?。?/td> 0K
描述: IC DAC 8BIT PARALLEL 16-QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時(shí)間: 400ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極;2 電壓,單極;2 電壓,雙極
采樣率(每秒): *
MAX5480
_______________Detailed Description
The MAX5480 is an 8-bit multiplying digital-to-analog
converter (DAC) that consists of a thin-film R-2R resistor
array with CMOS current steering switches. Figure 3
shows a simplified schematic of the DAC. The inverted
R-2R ladder divides the voltage or current reference in
a binary manner among the eight steering switches.
The magnitude of the current appearing at either OUT
terminal depends on the number of switches selected;
therefore, the output is an analog representation of the
digital input. The two OUT terminals must be held at the
same potential so a constant current is maintained in
each ladder leg. This makes the REF input current inde-
pendent of switch state and also ensures that the
MAX5480 maintains its excellent linearity performance.
Interface-Logic Information
Mode Selection
The inputs CS and WR control the MAX5480’s operat-
ing mode (see Table 1).
Write Mode
When CS and WR are both low, the MAX5480 is in write
mode, and its analog output responds to data activity at
the D0–D7 data-bus inputs. In this mode, the data
latches are transparent (see Tables 2 and 3).
Hold Mode
In hold mode, the MAX5480 retains the data that was
present on D0–D7 just prior to CS or WR assuming a
high state. The analog output remains at the value cor-
responding to the digital code locked in the data latch.
__________Applications Information
Using the MAX5480 in Voltage-
Output Mode (Single Supply)
The MAX5480 can be used either as a current-output
DAC (Figures 1 and 6) or as a voltage-output DAC
(Figures 2 and 5).
To use the MAX5480 in voltage mode, connect OUT1 to
the reference input and connect OUT2 to ground. REF,
now the DAC output, is a voltage source with a con-
stant output resistance of 10k
(nominally). This output
is often buffered with an op amp (Figure 5).
An advantage of voltage-mode operation is single-
supply operation for the complete circuit; i.e., a nega-
tive reference is not required for a positive output. It is
important to note that the range of the reference is
restricted in voltage mode. The reference input (voltage
at OUT1) must always be positive and is limited to no
more than VDD - 3V. If the reference voltage exceeds
this value, linearity is degraded.
8-Bit Parallel DAC in
QSOP-16 Package
4
_______________________________________________________________________________________
WR
L
H
X
H
CS
MAX5480
10pF
VOUT
16
14
15
VREF
VDD
R2
1k
R1
2k
D7–D0
CS
OUT1
12
DATA
INPUTS 4–11
13
OUT2
1
2
WR
R1 AND R2 USED ONLY IF GAIN
ADJUSTMENT IS REQUIRED.
REF
RFB
GND
3
VDD
MAX4330
Figure 1. Unipolar Binary Operation (Two-Quadrant Multiplication)
MAX5480
REF
INPUT*
OUTPUT
VOLTAGE
(10k
OUTPUT
RESISTANCE)
OUT1
REF
14
15
1
2
16
13
12
3
OUT2
RFB
VDD
+5V
GND
D7–D0
4–11
DATA IN
CS
WR
*(VDD - 3V, max)
Figure 2. Typical Operating Circuit (Voltage Mode—Unbuffered)
MODE
Write
Hold
DAC Response
DAC responds to data bus
(D0–D7) inputs.
Data bus (D0–D7) is locked out;
DAC holds last data present
when CS or WR assumed high
state.
Table 1. Mode-Selection Table
L = Low State, H = High State, X = Don’t Care
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