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參數(shù)資料
| 型號(hào)： | MAX5550 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Quadruple Low-Power Differential Line Receiver 20-LCCC -55 to 125 |
| 中文描述： | 雙路、10位、可編程、可提供30mA高輸出電流的DAC |
| 文件頁數(shù)： | 8/15頁 |
| 文件大小： | 397K |
| 代理商： | MAX5550 |
M
Detailed Description
Architecture
The MAX5550 10-bit, dual current-steering DAC (see
the
Functional Diagram
) operates with DAC update
rates up to 10Msps in SPI mode and 400ksps in I
2
C
mode. The converter consists of a 16-bit shift register
and input DAC registers, followed by a current-steering
array. The current-steering array generates full-scale
currents up to 30mA per DAC. An integrated +1.25V
bandgap reference, control amplifier, and an external
resistor determine each data converter’s full-scale out-
put range.
Reference Architecture and Operation
The MAX5550 provides an internal +1.25V bandgap ref-
erence or accepts an external reference voltage source
between +0.5V and +1.5V. REFIN serves as the input for
an external low-impedance reference source. Leave
REFIN unconnected in internal reference mode. Internal
or external reference mode is software selectable
through the SPI/I
2
C serial interface.
The MAX5550’s reference circuit (
Figure 1) employs a
control amplifier to regulate the full-scale current (I
FS
)
for the current outputs of the DAC. This device has a
software-selectable full-scale current range (see the
command summary in Table 4). After selecting a cur-
rent range, an external resistor (R
FSADJ
_) sets the full-
scale current. See Table 1 for a matrix of I
FS
and
R
FSADJ
selections.
During startup, when the power is first applied, the
MAX5550 defaults to the external reference mode, and
to the 1mA–2mA full-scale current-range mode.
DAC Data
The 10-bit DAC data is decoded as offset binary, MSB
first, with 1 LSB = I
FS
/ 1024, and converted into the cor-
responding current as shown in Table 2.
Serial Interface
The MAX5550 features a pin-selectable SPI/I
2
C serial
interface. Connect SPI/
I2C
to GND to select I
2
C mode, or
connect SPI/
I2C
to V
DD
to select SPI mode. SDA and
SCL (I
2
C mode) and DIN, SCLK, and
CS
(SPI mode)
facilitate communication between the MAX5550 and the
master. The serial interface remains active in shutdown.
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
8
_______________________________________________________________________________________
Pin Description
PIN
1
2
NAME
SCLK/SC
FUNCTION
Serial Clock Input. Connect SCL to V
DD
through a 2.4k
resistor in I
2
C mode.
Serial Data Input. Connect SDA to V
DD
through a 2.4k
resistor in I
2
C mode.
Chip-Select Input in SPI Mode/Address Select 0 in I
2
C Mode.
CS
is an active-low input. Connect A0 to V
DD
or GND to set the device address in I
2
C mode.
DIN/SDA
3
CS
/A0
4
SPI/
I2C
SPI/
I2C
Select Input. Connect SPI/
I2C
to V
DD
to select SPI mode, or connect SPI/
I2C
to GND to select I
2
C
mode.
5
DOUT/A1
Serial Data Output in SPI Mode/Address Select 1 in I
2
C Mode. Use DOUT to daisy chain the MAX5550 to
other devices or to read back in SPI mode. The digital data is clocked out on SCLK’s falling edge. Connect
A1 to V
DD
or GND to set the device address in I
2
C mode.
6, 13, 15
N.C.
No Connection. Leave unconnected or connect to GND.
7
REFIN
Refer ence Inp ut. D ve RE FIN w h an exter nal r efer ence sour ce b etw een + 0.5V and + 1.5V Leave RE FIN
unconnected i n i nter nal r efer ence m od e. Byp ass w h a 0.1μF cap aci or to GN D as cl ose to the d evi ce as p ossi b e.
8, 16
9
GND
OUTB
Ground
DACB Output. OUTB provides up to 30mA of output current.
10
FSADJB
D AC B Ful S cal e Ad ust Inp ut. For m axi m um ful scal e outp ut cur ent, connect a 20k
r esi stor b etw een FS AD JB
and GN D For m ni m um ful scal e cur ent, connect a 40k
r esi stor b etw een FS AD JB and GN D
11
FSADJA
D AC A Ful S cal e Ad ust Inp ut. For m axi m um ful scal e outp ut cur ent, connect a 20k
r esi stor b etw een FS AD JA
and GN D For m ni m um ful scal e cur ent, connect a 40k
r esi stor b etw een FS AD JA and GN D
DACA Output. OUTA provides up to 30mA of output current.
12
OUTA
14
V
DD
Power Supply Input. Connect V
DD
to a +2.7 to +5.25V power supply. Bypass V
DD
to GND with a 0.1μF
capacitor as close to the device as possible.
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