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參數(shù)資料
| 型號： | MAX5856AECM+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT DUAL 300MSPS 48-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 設(shè)置時間： | 11ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 792mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 300M |
MAX5856A
Dual 8-Bit, 300Msps DAC with 4x/2x/1x
Interpolation Filters and PLL
12
______________________________________________________________________________________
Pin Description (continued)
PIN
NAME
FUNCTION
15
DB5
Channel B Input Data Bit 5
16
DB4
Channel B Input Data Bit 4
17
DB3
Channel B Input Data Bit 3
20
CLK
Clock Output/Input. CLK becomes an input when the PLL is enabled. CLK is an output when the PLL
is disabled.
21
IDE
Interleave Data Mode Enable. When IDE is high, data for both DAC channels is written through port A
(bits DA7–DA0). When IDE is low, channel A data is latched on the rising edge of CLK and channel B
is latched on the falling edge of CLK.
22
DB2
Channel B Input Data Bit 2
23
DB1
Channel B Input Data Bit 1
24
DB0
Channel B Input Data Bit 0
27
CW
Active-Low Control Word Write Pulse. The control word is latched on the falling edge of CW.
28
LOCK
PLL Lock Signal Output. High level indicates that PLL is locked to the CLK signal.
29
PLLEN
PLL Enabled Input. PLL is enabled when PLLEN is high.
30
CLKXP
Differential Clock Input Positive Terminal. Connect to PGND when the PLL is enabled. Bypass CLKXP
with a 0.01F capacitor to PGND when CLKXN is in single-ended mode.
31
CLKXN
Differential Clock Input Negative Terminal. Connect to PVDD when the PLL is enabled. Bypass CLKXN
with a 0.01F capacitor to PGND when CLKXP is in single-ended mode.
32
PVDD
PLL Power Supply. See Power Supplies, Bypassing, Decoupling, and Layout section.
33
PGND
PLL Ground
34
PLLF
PLL Loop Filter. Connect a 4.12k
resistor in series with a 100pF capacitor between PLLF and PGND.
35
REN
Active-Low Reference Enable. Connect REN to AGND to activate the on-chip 1.24V reference.
36
REFO
Reference I/O. REFO serves as the reference input when the internal reference is disabled. If the
internal 1.24V reference is enabled, REFO serves as the output for the internal reference. When the
internal reference is enabled, bypass REFO to AGND with a 0.1F capacitor.
39
REFR
Full-Scale Current Adjustment. To set the output full-scale current, connect an external resistor RSET
between REFR and AGND. The output full-scale current is equal to 32
× VREFO / RSET.
40, 46
AVDD
Analog Power Supply. See Power Supplies Bypassing, Decoupling, and Layout section.
41
OUTNB
Channel B Negative Analog Current Output
42
OUTPB
Channel B Positive Analog Current Output
43
AGND
Analog Ground
44
OUTNA
Channel A Negative Analog Current Output
45
OUTPA
Channel A Positive Analog Current Output
—EP
Exposed Pad. Connect to the ground plane.
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參數(shù)描述 |
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| MAX5858AECM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX5858AECM+D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 2Ch 300Msps DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5858AECM+TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 2Ch 300Msps DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5858AECM-D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5858AECM-TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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