
M
SC70, Single/Dual Low-Voltage,
Low-Power μP Reset Circuits
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= full range, T
A
= -40
°
C to +125
°
C, unless otherwise specified. Typical values are at T
A
= +25
°
C.) (Note 1)
Note 1:
Specifications over temperature are guaranteed by design, not production tested.
PARAMETER
SYMBOL
CONDITIONS
MIN
1
TYP
MAX
UNITS
μs
ns
ns
k
MR
Minimum Input Pulse Width
MR
Glitch Rejection
MR
to Reset Delay
100
200
63
1350
1.27
MAX6381
–
MAX6389
MAX6390
T
A
= +25
°
C
T
A
= 0
°
C to +85
°
C
T
A
= -40
°
C to +125
°
C
V
RESETIN
falling at 4mV/μs from
V
THRST
+ 40mV to V
THRST
- 40mV
32
800
1.245
1.232
1.219
100
2300
1.295
1.308
1.321
MR
Internal Pullup Resistance
Reset IN Input Threshold
V
THRST
V
RESET IN to RESET Delay
4.5
μs
RESET IN Input Leakage Current
I
RESET
IN
-50
±1
+50
0.4
0.3
0.3
nA
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset asserted
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset asserted
V
CC
≥
1.0V, I
SINK
= 80μA, reset asserted
Open-Drain
RESET
Output
Voltage
V
OL
V
Open-Drain
RESET
Output
Leakage Current
I
LKG
V
CC
> V
TH
,
RESET
not asserted
1.0
μA
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset asserted
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset asserted
V
CC
≥
1.0V, I
SINK
= 80μA, reset asserted
V
CC
≥
4.5V, I
SOURCE
= 800μA, reset not
asserted
0.4
0.3
0.3
V
OL
0.8
V
CC
Push-Pull
RESET
Output Voltage
V
OH
V
CC
≥
2.5V, I
SOURCE
= 500μA, reset not
asserted
0.8
V
CC
V
V
CC
≥
4.5V, I
SOURCE
= 800μA, reset asserted
0.8
V
CC
V
CC
≥
2.5V, I
SOURCE
= 500μA, reset asserted
0.8
V
CC
V
CC
≥
1.8V, I
SOURCE
= 150μA, reset asserted
0.8
V
CC
V
OH
V
CC
≥
1.0V, I
SOURCE
= 1μA, reset asserted
0.8
V
CC
V
CC
≥
4.5V, I
SINK
= 3.2mA, reset not
asserted
0.4
Push-Pull RESET Output Voltage
V
OL
V
CC
≥
2.5V, I
SINK
= 1.2mA, reset not
asserted
0.3
V