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參數(shù)資料
| 型號： | MAX6701A-KA-T |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Low-Voltage, SOT23 uP Supervisors with Power-Fail In/Out, Manual Reset, and Watchdog Timer |
| 中文描述： | 低電壓，SOT23封裝與電源監(jiān)控失效/輸出，手動復(fù)位和看門狗定時器 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 207K |
| 代理商： | MAX6701A-KA-T |
Detailed Description
Figures 1, 2, and 3 are functional diagrams for the
MAX6705(A)/MAX6706(A)/MAX6707(A), MAX6704/
MAX6708, and MAX6701(A)/ MAX6702(A)/MAX6703(A),
respectively.
Reset Output
A microprocessor
’
s (μP
’
s) reset input starts the μP in a
known state. The MAX6701
–
MAX6708 assert reset dur-
ing power-up and prevent code execution errors during
power-down or brownout conditions.
On power-up, once V
CC
reaches 1V,
RESET
is a guar-
anteed logic low of 0.4V or less. As V
CC
rises,
RESET
stays low. After V
CC
, RST_IN1, or RST_IN2 rise above
the reset threshold, an internal timer holds
RESET
low
for about 200ms.
RESET
pulses low whenever V
CC
dips
below the reset threshold, including brownout condi-
tions. If a brownout occurs in the middle of a previously
initiated reset pulse, the pulse continues for at least
another 140ms. On power-down, once V
CC
falls below
the reset threshold,
RESET
stays low and is guaranteed
to be 0.4V or less, until V
CC
drops below 1V.
The MAX6702(A)/MAX6704/MAX6706(A)/MAX6708
active-high RESET output is the complement of the
RESET
output, and is guaranteed to be valid with V
CC
down to 1V.
M
Low-Voltage, SOT23 μP Supervisors with Power-
Fail In/Out, Manual Reset, and Watchdog Timer
6
_______________________________________________________________________________________
Pin Description (continued)
PIN
MAX6701(A)
MAX6702(A)
MAX6703(A)
MAX6704
MAX6705(A)
MAX6706(A)
MAX6707(A)
MAX6708
NAME
FUNCTION
8
—
8
—
WDO
Active-Low Watchdog Output (Open Drain or Push-Pull).
WDO
is asserted whenever the watchdog times out and V
CC
or the
reset inputs are below their respective thresholds.
WDO
deasserts after a valid WDI transition without a reset timeout
period. In the A versions,
WDO
deasserts without a timeout
delay when V
CC
, RST_IN1, and RST_IN2 rises above its
threshold. Pull
MR
low to assert
WDO
(MAX6701/MAX6702/
MAX6703/MAX6705/MAX6706/MAX6707 only). Pull
MR
low to
deassert
WDO
(MAX6701(A)/MAX6702(A)/MAX6703(A)/
MAX6705(A)/MAX6706(A)MAX6707(A) only).
7*
8
7*
8
RESET
Active-High Reset Output (Push-Pull). RESET changes from low
to high when the V
CC
input drops below the selected reset
threshold (or RST_IN1/RST_IN2 for MAX6701(A)/MAX6702(A)/
MAX6703(A),
MR
is pulled low, or the watchdog triggers a
reset (MAX6704 only). RESET remains high for the reset
timeout period after the reset conditions are terminated.
4
—
—
—
RST_IN1
Input for User-Adjustable V
CC2
Monitor. High-impedance input
for second internal reset comparator. Connect this pin to an
external resistive-divider network to set the reset threshold
voltage; 0.62V (typ) threshold. Connect to V
CC
when not used.
Reset is asserted when either V
CC
, RST_IN1, or RST_IN2 are
below threshold.
5
—
—
—
RST_IN2
Input for User-Adjustable V
CC3
Monitor. High-impedance input
for third internal reset comparator. Connect this pin to an
external resistive-divider network to set the reset threshold
voltage; 0.62V (typ) threshold. Connect to V
CC
when not used.
Reset is asserted when either V
CC
, RST_IN1, or RST_IN2 are
below threshold.
*
RESET active-high for the MAX6702(A)/MAX6706(A).
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