參數(shù)資料
型號(hào): MAX6730UTSD2+T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: Single-/Dual-/Triple-Voltage µP Supervisory Circuits with Independent Watchdog Output
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO6
封裝: SOT-23, 6 PIN
文件頁(yè)數(shù): 14/16頁(yè)
文件大小: 244K
代理商: MAX6730UTSD2+T
MAX6730–MAX6735
Single-/Dual-/Triple-Voltage P Supervisory
Circuits with Independent Watchdog Output
_______________________________________________________________________________________
7
Pin Description
PIN
MAX6730
MAX6731
MAX6732
MAX6733
MAX6734
MAX6735
NAME
FUNCTION
11
1
RST
Active-Low Reset Output. The MAX6730/MAX6732/MAX6734 provide an open-
drain output. The MAX6731/MAX6733/MAX6735 provide a push-pull output. RST
asserts low when any of the following conditions occur: VCC1 or VCC2 drops below
its preset threshold, RSTIN drops below its reset threshold, or MR is driven low.
Open-drain versions require an external pullup resistor.
22
2
GND
Ground
33
4
WDO
Active-Low Watchdog Output. The MAX6730/MAX6732/MAX6734 provide an open-
drain WDO output. The MAX6731/MAX6733/MAX6735 provide a push-pull WDO
output. WDO asserts low when no low-to-high or high-to-low transition occurs on
WDI within the watchdog timeout period (tWD) or if an undervoltage lockout
condition exists for VCC1, VCC2, or RSTIN. WDO deasserts without a timeout period
when VCC1, VCC2, and RSTIN exceed their reset thresholds, or when the manual
reset input is deasserted. Open-drain versions require an external pullup resistor.
4
5
MR
Active-Low Manual Reset Input. Drive MR low to force a reset. RST remains
asserted as long as MR is low and for the reset timeout period after MR releases
high. MR has a 50k
pullup resistor to VCC1; leave MR open or connect to VCC1 if
unused.
55
3
WDI
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period, the internal watchdog timer expires and the watchdog output asserts low.
The internal watchdog timer clears whenever RST asserts or a rising or falling edge
on WDI is detected. The watchdog has an initial watchdog timeout period (35s min)
after each reset event and a short timeout period (1.12s min) after the first valid
WDI transition. Floating WDI does not disable the watchdog timer function.
66
8
VCC1
Primary Supply Voltage Input. VCC1 provides power to the device when it is greater
than VCC2. VCC1 is the input to the primary reset threshold monitor.
46
VCC2
Secondary Supply Voltage Input. VCC2 provides power to the device when it is
greater than VCC1. VCC2 is the input to the secondary reset threshold monitor.
——
7
RSTIN
Undervoltage Reset Comparator Input. RSTIN provides a high-impedance
comparator input for the adjustable reset monitor. RST asserts low if the voltage at
RSTIN drops below the 626mV internal reference voltage. Connect a resistive
voltage-divider to RSTIN to monitor voltages higher than 626mV. Connect RSTIN to
VCC1 or VCC2 if unused.
相關(guān)PDF資料
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