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參數(shù)資料
| 型號： | MAX6852AEE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 顯示驅動器 |
| 英文描述： | 4-Wire Interfaced, 5 x 7 Matrix Vacuum- Fluorescent Display Controller |
| 中文描述： | VACUUM FLUOR DISPLAY DRIVER, PDSO16 |
| 封裝： | 0.150 INCH, 0.025 INCH PITCH, MO-137AA, QSOP-16 |
| 文件頁數(shù)： | 5/32頁 |
| 文件大?。?/td> | 489K |
| 代理商： | MAX6852AEE |
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M
4-Wire Interfaced, 5
7 Matrix Vacuum-
Fluorescent Display Controller
_______________________________________________________________________________________
5
f
OSC
vs. TEMPERATURE
M
TEMPERATURE (
°
C)
f
O
110
95
80
65
50
35
20
5
-10
-25
0.5
1.0
1.5
2.0
2.5
0
-40
125
V+ = 2.7V
V+ = 3.3V
V+ = 3.6V
DEAD-CLOCK OSC FREQUENCY
vs. TEMPERATURE
M
TEMPERATURE (
°
C)
F
110
95
80
65
50
35
20
5
-10
-25
-40
125
0.02
0.04
0.06
0.08
0.10
0.12
0.14
0.16
0.18
0
V+ = 2.7V
V+ = 3.6V
V+ = 3.3V
Typical Operating Characteristics (continued)
(Typical operating circuit, V+ = 3.3V, T
A
= +25
°
C, unless otherwise noted.)
Pin Description
PIN
NAME
FUNCTION
1
VFCLK
Serial-Clock Output to External Driver. Push-pull clock output to external display driver. On VFCLK
’
s
falling edge, data is clocked out of VFDOUT.
2
VFDOUT
Serial-Data Output to External Driver. Push-pull data output to external display driver.
3
VFLOAD
Serial-Load Output to External Driver. Push-pull load output to external display driver. Rising edge is
used by external display driver to load serial data into display latch.
4
VFBLANK
Display Blanking Output to External Driver. Push-pull blanking output to external display driver used for
PWM intensity control.
5
PUMP
Charge-Pump Output and General-Purpose Output. User-configurable push-pull logic output can also
be used as a driver for external charge pump.
6
PHASE1
Filament Drive PHASE1 Output and General-Purpose Output. User-configurable push-pull logic output
can also be used as a driver for external filament bridge drive.
7
PHASE2
Filament Drive PHASE2 Output and General-Purpose Output. User-configurable push-pull logic output
can also be used as a driver for external filament bridge drive.
8
9
10
V+
GND
PORT0
Positive Supply Voltage. Bypass V+ to GND with a 0.1μF ceramic capacitor.
Ground
PORT0 General-Purpose Output. User-configurable push-pull logic output.
11
SCLK
Serial-Clock Input. On SCLK
’
s rising edge, data shifts into the internal shift register, and data is
clocked out of DOUT. SCLK is active only while
CS
is low.
12
DIN
Serial-Data Input. Data from DIN loads into the internal 16-bit shift register on SCLK
’
s rising edge.
13
CS
Chip-Select Input. Serial data is loaded into the shift register while
CS
is low. The most recent 16 bits of
data latch on
CS
’
s rising edge.
14
PORT1
PORT1 General-Purpose Output. User-configurable push-pull logic output.
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