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參數(shù)資料
| 型號： | MAX6883ETE+T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | Dual-/Triple-Voltage, Power-Supply Sequencers/Supervisors |
| 中文描述： | POWER SUPPLY SUPPORT CKT, QCC24 |
| 封裝： | 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, TQFN-16 |
| 文件頁數(shù)： | 19/19頁 |
| 文件大?。?/td> | 401K |
| 代理商： | MAX6883ETE+T |
MAX6880–MAX6883
Dual-/Triple-Voltage, Power-Supply
Sequencers/Supervisors
_______________________________________________________________________________________
9
Pin Description
PIN
MAX6880
MAX6881
MAX6882
MAX6883
NAME
FUNCTION
1, 11,
12, 15
——
1, 8, 9, 10
N.C.
No Connection. Not internally connected.
2
—
1
—
ABP
Internal Supply Bypass Input. Bypass ABP with a 1F capacitor to
GND. ABP maintains the device supply voltage during rapid power-
down conditions.
3
2
—
SET3
4
3
2
SET2
5
4
3
SET1
Externally Adjusted IN_ Undervoltage Lockout Threshold. Connect
SET_ to an external resistor-divider network to set the desired
undervoltage threshold for each IN_ supply (see the Typical
Application Circuit). All SET_ inputs must be above the internal
SET_ threshold (0.5V) to enable sequencing functionality.
654
4
EN/UV
Logic-Enable Input or Undervoltage Lockout Monitor Input. EN/UV
must be high (EN/UV > VEN_R) to enable voltage sequencing
power-up operation. OUT_ begins tracking down when EN/UV <
VEN_F. Connect EN/UV to an external resistor-divider network to set
the external UVLO threshold.
7
6
5
GND
Ground
876
6
DELAY
Sequence Delay Select Input. Connect a capacitor from DELAY
to GND to select the desired delay period before sequencing is
enabled (after all SET_ inputs and EN/UV are above their respective
thresholds) or between supply sequences. Leave DELAY
unconnected for the default 200s delay period.
9
8
7
SLEW
Slew-Rate Adjustment Input. Connect a capacitor from SLEW
to GND to select the desired OUT_ slew rate.
10
—
8
—
TIMEOUT
PG/RST Timeout Period Adjust Input. PG/RST asserts high after the
timeout period when all OUT_ exceed their IN_ referenced
threshold. Connect a capacitor from TIMEOUT to GND to set the
desired timeout period. Leave TIMEOUT unconnected for the
default 200s delay period.
13
—
9
—
MARGIN
Margin Input, Active-Low. Drive MARGIN low to enable margin
mode (see the Margin Input (MARGIN) (MAX6880/MAX6882)
section). The MARGIN functionality is disabled (returns to normal
monitoring mode) after MARGIN returns high. MARGIN is internally
pulled up to ABP through a 10A current source.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX6884ETP | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6884ETP+ | 功能描述:監(jiān)控電路 EEPROM-Prog Hex Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6884ETP+T | 功能描述:監(jiān)控電路 EEPROM-Prog Hex Power-Sup Sequencer RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6884ETP-T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6884EVCMOD2 | 功能描述:監(jiān)控電路 Programmers, Development Systems RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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