參數(shù)資料
型號: MAX7312ATG+
廠商: Maxim Integrated Products
文件頁數(shù): 2/16頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 16B 24TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 75
接口: I²C,SM 總線
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 2 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 管件
包括: POR
產(chǎn)品目錄頁面: 1424 (CN2011-ZH PDF)
MAX7312
Data is clocked into a register on the falling edge of the
acknowledge clock pulse. After reading the first byte,
additional bytes may be read and reflect the content in
the other register in the pair. For example, if input port 1
is read, the next byte read is input port 2. An unlimited
number of data bytes can be read in one read trans-
mission, but the final byte received must not be
acknowledged by the bus master.
Interrupt (
INT)
The open-drain interrupt output, INT, activates when
one of the port pins changes states and only when the
pin is configured as an input. The interrupt deactivates
when the input returns to its previous state or the input
register is read (Figure 9). A pin configured as an out-
put does not cause an interrupt. Each 8-bit port register
is read independently; therefore, an interrupt caused
by port 1 is not cleared by a read of port 2’s register.
Changing an I/O from an output to an input may cause
a false interrupt to occur if the state of that I/O does not
match the content of the input port register.
Input/Output Port
When an I/O is configured as an input, FETs Q1 and Q2
are off (Figure 10), creating a high-impedance input. All
inputs are overvoltage protected to 5.5V, independent
of supply voltage. When a port is configured as an out-
put, either Q1 or Q2 is on, depending on the state of the
output port register. When V+ powers up, an internal
power-on reset sets all registers to their respective
defaults (Table 1).
Input Port Registers
The input port registers (Table 2) are read-only ports.
They reflect the incoming logic levels of the pins,
regardless of whether the pin is defined as an input or
an output by the respective configuration register. A
read of the input port 1 register latches the current
value of I/O0–I/O7. A read of the input port 2 register
latches the current value of I/O8–I/O15. Writes to the
input port registers are ignored.
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
10
______________________________________________________________________________________
D
SET
Q
CLR
Q
D
SET
Q
CLR
Q
DATA FROM
SHIFT REGISTER
WRITE
CONFIGURATION
PULSE
DATA FROM
SHIFT REGISTER
WRITE PULSE
READ PULSE
OUTPUT PORT
REGISTER
D
SET
Q
CLR
Q
POLARITY INVERSION
REGISTER
POLARITY
REGISTER
DATA
D
SET
Q
CLR
Q
INPUT PORT
REGISTER
CONFIGURATION
REGISTER
Q1
Q2
DATA FROM
SHIFT REGISTER
WRITE POLARITY
PULSE
POWER-ON
RESET
TO INT
INPUT PORT
REGISTER DATA
VSS
VDD
I/O PIN
OUTPUT PORT
REGISTER DATA
Figure 10. Simplified Schematic of I/Os
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MAX7312ATG+ 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
MAX7312ATG+T 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
MAX7312ATG-T 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
MAX7312AUG 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
MAX7312AUG+ 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel