參數(shù)資料
型號(hào): MAX7313ATG+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 20/26頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 16B 24TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 75
接口: I²C
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 管件
MAX7313
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = + 25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TA = +25°C
0.15
0.26
TA = -40°C to +85°C
0.3
V+ = 2V, ISINK = 20mA
TA = TMIN to TMAX
0.32
TA = +25°C
0.13
0.23
TA = -40°C to +85°C
0.26
V+ = 2.5V, ISINK = 20mA
TA = TMIN to TMAX
0.28
TA = +25°C
0.12
0.23
TA = -40°C to +85°C
0.24
Output Low Voltage
P0–P15,
INT/O16
VOL
V+ = 3.3V, ISINK = 20mA
TA = TMIN to TMAX
0.26
V
Output Low-Voltage SDA
VOLSDA
ISINK = 6mA
0.4
V
PWM Clock Frequency
fPWM
32
kHz
TIMING CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Serial Clock Frequency
fSCL
400
kHz
Bus Free Time Between a STOP and a START
Condition
tBUF
1.3
s
Hold Time, Repeated START Condition
tHD, STA
0.6
s
Repeated START Condition Setup Time
tSU, STA
0.6
s
STOP Condition Setup Time
tSU, STO
0.6
s
Data Hold Time
tHD, DAT
(Note 2)
0.9
s
Data Setup Time
tSU, DAT
180
ns
SCL Clock Low Period
tLOW
1.3
s
SCL Clock High Period
tHIGH
0.7
s
Rise Time of Both SDA and SCL Signals, Receiving
tR
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of Both SDA and SCL Signals, Receiving
tF
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of SDA Transmitting
tF.TX
(Notes 2, 3, 5)
20 +
0.1Cb
250
ns
Pulse Width of Spike Suppressed
tSP
(Notes 2, 6)
50
ns
Capacitive Load for Each Bus Line
Cb
(Notes 2, 3)
400
pF
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