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參數(shù)資料
| 型號： | MAX7314AEG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 16B 24QSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 18 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-QSOP |
| 包裝： | 帶卷 (TR) |
MAX7314
Blink Mode
In blink mode, the output ports can be flipped between
using either the blink phase 0 registers or the blink
phase 1 registers. Flip control is both hardware (the
BLINK input) and software control (the blink flip flag B
in the configuration register) (Table 4).
The blink function can be used for LED effects by pro-
gramming different display patterns in the two sets of
output port registers, and using the software or hard-
ware controls to flip between the patterns.
If the blink phase 1 registers are written with 0xFF, then
the BLINK input can be used as a hardware disable to,
for example, instantly turn off an LED pattern pro-
grammed into the blink phase 0 registers. This tech-
nique can be further extended by driving the BLINK
input with a PWM signal to modulate the LED current to
provide fading effects.
The blink mode is enabled by setting the blink enable flag
E in the configuration register (Table 4). When blink mode
is enabled, the states of the blink flip flag and the BLINK
input are EXOR’ed to set the phase, and the output ports
are set by either the blink phase 0 registers or the blink
phase 1 registers (Figure 11) (Table 7).
The blink mode is disabled by clearing the blink enable
flag E in the configuration register (Table 4). When blink
mode is disabled, the state of the blink flip flag is
ignored, and the blink phase 0 registers alone control
the output ports.
Blink Phase Registers
When the blink function is disabled, the two blink phase
0 registers set the logic levels of the 16 ports (P0
through P15) when configured as outputs (Table 8). A
duplicate pair of registers called the blink phase 1 reg-
isters are also used if the blink function is enabled (Table
9). A logic high sets the appropriate output port high
impedance, while a logic low makes the port go low.
18-Port GPIO with LED Intensity Control,
Interrupt, and Hot-Insertion Protection
14
______________________________________________________________________________________
Table 4. Configuration Register (continued)
REGISTER DATA
REGISTER
ADDRESS
CODE
(hex)
D7
D6
D5
D4
D3
D2
D1
D0
CONFIGURATION
R/
W
INTERRUPT
STATUS
BLINK
STATUS
INTERRUPT
OUTPUT
CONTROL
AS
GPO
INTERRUPT
ENABLE
GLOBAL
INTENSITY
BLINK
FLIP
BLINK
ENABLE
Write device configuration
0
Read back device configuration
1
INT
BLINK
O1
O0
IG
B
E
Read back BLINK input pin status—
input is low
1
X
0
XXX
Read back BLINK input pin status—
input is high
1
X
1
XXX
Read back data change interrupt status
—data change is not detected, and
INT/O16 output is high when interrupt
enable (I bit) is set
1
0
XXXXXXX
Read back data change interrupt status
—data change is detected, and INT/O16
output is low when interrupt enable (I bit) is set
1
0x0F
1
XXXXXXX
X = Don’t care.
BLINK PHASE REGISTERS
BLINK INPUT
BLINK FLIP FLAG B
BLINK ENABLE FLAG E
Figure 11. Blink Logic
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| MAX7314ATG | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX7314ATG+ | 功能描述:外圍驅(qū)動器與原件 - PCI 18-Port GPIO RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX7314ATG+T | 功能描述:接口-I/O擴(kuò)展器 18-Port GPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX7314ATG-T | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX7314EVKIT+ | 功能描述:外圍驅(qū)動器與原件 - PCI Evaluation Kit for the MAX7314 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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