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參數(shù)資料
| 型號： | MAX7318AUG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 17/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 16B 24TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 16 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
| 包括： | POR |
Each transmission consists of a START condition sent by
a master, followed by the MAX7318 7-bit slave address
plus R/
W bit, a register address byte, 1 or more data
bytes, and finally a STOP condition (Figure 3).
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit, which the
recipient uses as a handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX7318, the MAX7318
MAX7318
2-Wire-Interfaced, 16-Bit, I/O Port Expander
with Interrupt and Hot-Insertion Protection
_______________________________________________________________________________________
7
SDA
SCL
S
START
CONDITION
P
STOP
CONDITION
Figure 3. START and STOP Conditions
SDA
SCL
DATA LINE STABLE; DATA VALID CHANGE OF DATA ALLOWED
Figure 4. Bit Transfer
SCL
SDA
BY TRANSMITTER
CLOCK PULSE FOR ACKNOWLEDGMENT
START CONDITION
SDA
BY RECEIVER
12
8
9
S
Figure 5. Acknowledge
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參數(shù)描述 |
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| MAX7318AWG | 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX7318AWG+ | 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX7318AWG+T | 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX7318AWG-T | 功能描述:接口-I/O擴(kuò)展器 16-Bit I/O Port Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| MAX7318EVKIT+ | 功能描述:界面開發(fā)工具 Evaluation Kit for the MAX7318 RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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