I2C Port Expander with 8 Open-Drain I/Os 10 Maxim Integrated Accessing t" />
參數(shù)資料
型號(hào): MAX7321AEE+T
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 2/15頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 1.71 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 帶卷 (TR)
包括: POR
MAX7321
I2C Port Expander with 8 Open-Drain I/Os
10
Maxim Integrated
Accessing the MAX7321
The MAX7321 is accessed through an I2C interface. The
transition flags are cleared, and INT is deasserted each
time the device acknowledges the I2C slave address.
A single-byte read from the MAX7321 returns the sta-
tus of the eight I/O ports.
A 2-byte read returns first the status of the eight I/O
ports (as for a single-byte read), followed by the transi-
tion flags.
A multibyte read (more than 2 bytes before the I2C
STOP bit) repeatedly returns the port data, alternating
with the transition flags. As the port data is resampled
for each transmission, and the transition flags are reset
each time, a multibyte read continuously returns the
current data and identifies any changing ports.
If a port data change occurs during the read sequence,
INT is reasserted after the I2C STOP bit. The MAX7321
does not generate another interrupt during a single-
byte or multibyte read.
Port data is sampled during the preceding I2C
acknowledge bit (the acknowledge bit for the I2C slave
address in the case of a single-byte or 2-byte read).
A single-byte write to the MAX7321 sets the logic state
of all eight I/O ports.
A multibyte write to the MAX7321 repeatedly sets the
logic state of all eight I/O ports.
Reading from the MAX7321
A read from the MAX7321 starts with the master trans-
mitting the MAX7321’s slave address with the R/W bit
set high. The MAX7321 acknowledges the slave
address, and samples the ports during the acknowl-
edge bit. INT deasserts during the slave address
acknowledge.
Typically, the master reads 1 or 2 bytes from the
MAX7321, each byte being acknowledged by the mas-
ter upon reception with the exception of the last byte.
When the master reads 1 byte from the MAX7321 and
subsequently issues a STOP condition (Figure 6), the
MAX7321 transmits the current port data, clears the
change flags, and resets the transition detection. INT
deasserts during the slave acknowledge. The new
snapshot data is the current port data transmitted to the
master; therefore, port changes ocurring during the
transmission are detected. INT remains high until the
STOP condition.
The master can read 2 bytes from the MAX7321 and
then issue a STOP condition (Figure 7). In this case, the
MAX7321 transmits the current port data, followed by the
change flags. The change flags are then cleared, and
transition detection resets. INT goes high (high imped-
ance if an external pullup resistor is not fitted) during the
slave acknowledge. The new snapshot data is the cur-
rent port data transmitted to the master; therefore, port
changes occurring during the transmission are detected.
INT remains high until the STOP condition.
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 3. Bit Transfer
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGMENT
START
CONDITION
SDA BY
RECEIVER
12
89
S
Figure 4. Acknowledge
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