I2C Port Expander with Eight Push-Pull Outputs and Eight Inputs ________" />
參數(shù)資料
型號(hào): MAX7324ATG+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 18/20頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 24TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 1.71 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 帶卷 (TR)
包括: POR
MAX7324
I2C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
_______________________________________________________________________________________
7
A latching interrupt output, INT, is programmed to flag
input data changes on input ports through an interrupt
mask register. By default, data changes on any input
port force INT to a logic-low. The interrupt output INT
and all transition flags are cleared when the MAX7324
is next accessed through the serial interface.
Internal pullup resistors to V+ are selected by the
address select inputs, AD0 and AD2. Pullups are
enabled on the input ports in groups of four (see Table 2).
Initial Power-Up
On power-up, the transition detection logic is reset, and
INT is deasserted. The interrupt mask register is set to
0xFF, enabling the interrupt output for transitions on all
eight input ports. The transition flags are cleared to
indicate no data changes. The power-up default states
of the eight push-pull outputs are set according to the
I2C slave address selection inputs, AD0 and AD1 (see
Table 3).
Power-On Reset
The MAX7324 contains an integral power-on-reset
(POR) circuit that ensures all registers are reset to a
known state on power-up. When V+ rises above VPOR
(1.6V max), the POR circuit releases the registers and
2-wire interface for normal operation. When V+ drops
below VPOR, the MAX7324 resets all register contents
to the POR defaults (Tables 2 and 3).
RST Input
The RST input voids any I2C transaction involving the
MAX7324, forcing the MAX7324 into the I2C STOP con-
dition. A reset does not affect the interrupt output (INT).
Standby Mode
When the serial interface is idle, the MAX7324 automat-
ically enters standby mode, drawing minimal supply
current.
Slave Address, Power-Up Default Logic
Levels, and Input Pullup Selection
Address inputs AD0 and AD2 determine the MAX7324
slave address and select which inputs have pullup
resistors. Pullups are enabled on the input ports in
groups of four (see Table 2).
The MAX7324 slave address is determined on each I2C
transmission, regardless of whether the transmission is
actually addressing the MAX7324. The MAX7324 distin-
guishes whether address inputs AD0 and AD2 are con-
nected to SDA or SCL instead of fixed logic levels V+
or GND during this transmission. This means that the
MAX7324 slave address can be configured dynamical-
ly in the application without cycling the device supply.
On initial power-up, the MAX7324 cannot decode the
address inputs AD0 and AD2 fully until the first I2C
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
PART
I2C
SLAVE
ADDRESS
INPUTS
INPUT
INTERRUPT
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
CONFIGURATION
MAX7323
110xxxx
Up to 4
Up to 4
4
4 I/O, 4 output-only versions:
4 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
4 push-pull outputs with selectable power-up default
levels.
MAX7328
MAX7329
0100xxx
0111xxx
Up to 8
Up to 8
PCF8574-, PCF8574A-compatible versions:
8 open-drain I/O ports with nonlatching transition
detection interrupt and pullups on all ports.
Table 1. MAX7319–MAX7329 Family Comparison (continued)
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