I2C Port Expander with 12 Push-Pull Outputs and 4 Inputs _______________" />
參數(shù)資料
型號: MAX7326ATG+T
廠商: Maxim Integrated Products
文件頁數(shù): 3/20頁
文件大小: 0K
描述: IC I/O EXPANDER I2C 16B 24TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
接口: I²C
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時鐘: 400kHz
電源電壓: 1.71 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 帶卷 (TR)
包括: POR
MAX7326
I2C Port Expander with 12 Push-Pull Outputs
and 4 Inputs
______________________________________________________________________________________
11
Acknowledge
The acknowledge bit is a clocked 9th bit the recipient
uses to acknowledge receipt of each byte of data
(Figure 4). Each byte transferred effectively requires 9
bits. The master generates the 9th clock pulse, and the
recipient pulls down SDA during the acknowledge
clock pulse, so the SDA line is stable low during the
high period of the clock pulse. When the master is
transmitting to the MAX7326, the MAX7326 generates
the acknowledge bit because the device is the recipi-
ent. When the MAX7326 is transmitting to the master,
the master generates the acknowledge bit because the
master is the recipient.
Slave Address
The MAX7326 has two different 7-bit slave addresses
(Figure 5). The addresses are different to communicate
to the eight push-pull outputs, O8–O15, or the other
eight I/Os. The 8th bit following the 7-bit slave address
is the R/W bit. It is low for a write command and high for
a read command.
The first (A6), second (A5), and third (A4) bits of the
MAX7326 slave address are always 1, 1, and 0 (O0, O1,
I2–I5, O6, and O7) or 1, 0, and 1 (O8–O15). Connect
AD0 and AD2 to GND, V+, SDA, or SCL to select slave
address bits A3, A2, A1, and A0. The MAX7326 has 16
possible slave addresses (Tables 2 and 3), allowing up
to 16 MAX7326 devices on an I2C bus.
Accessing the MAX7326
The MAX7326 is accessed though an I2C interface. The
MAX7326 provides two different 7-bit slave addresses
for either the group A of eight ports (O0, O1, I2–I5, O6,
O7) or the group B of eight ports (O8–O15). See Tables
2 and 3.
A
single-byte read from the group A ports of the
MAX7326 returns the status of the four input ports and
four output ports (read back as inputs), and clears both
the internal transition flags and the INT output when the
master acknowledges the salve address byte. A single-
byte read from the group B ports of the MAX7326
returns the status of the eight output ports, read back
as inputs.
A
2-byte read from the group A ports of the MAX7326
returns the status of the four input ports (as for a single-
byte read), followed by the four transition flags for the
four input ports and four output ports. The internal tran-
sition flags and the INT output are cleared when the
master acknowledges the slave address byte, but the
previous transition flag data is sent as the second byte.
A 2-byte read from the group B ports of the MAX7326
repeatedly returns the status of the eight output ports,
read back as inputs.
A
multibyte read (more than 2 bytes before the I2C
STOP bit) from the group A ports of the MAX7326
repeatedly returns the port data, followed by the transi-
tion flags. As the data is resampled for each transmis-
sion, and the transition flags are reset each time, a
multibyte read continuously returns the current data
and identifies any changing input ports.
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGMENT
START
CONDITION
SDA BY
RECEIVER
12
89
S
Figure 4. Acknowledge
SDA
SCL
A5
MSB
LSB
ACK
A4
A1
1A3
A0
A2
R/W
Figure 5. Slave Address
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