- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385552 > MAX792_EJE (Maxim Integrated Products, Inc.) Microprocessor and Non-Volatile Memory Supervisory Circuits PDF資料下載
參數(shù)資料
| 型號： | MAX792_EJE |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Microprocessor and Non-Volatile Memory Supervisory Circuits |
| 中文描述： | 微處理器和非揮發(fā)性內(nèi)存監(jiān)控電路 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 250K |
| 代理商： | MAX792_EJE |
M
Mic roproc essor and Non-Volatile
Memory S upervisory Circ uits
12
______________________________________________________________________________________
default is 1.6sec. Select alternative timeout periods by
connecting an external capacitor from SWT to GND
(see Selecting an Alternative Watchdog Timeout sec-
tion). When V
CC
is below the reset threshold, the watch-
dog function is disabled.
Watchdog Output
WDO
remains high if there is a transition or pulse at WDI
during the watchdog timeout period. The watchdog
function is disabled and
WDO
is a logic high when V
CC
is below the reset threshold. If a system reset is desired
on every watchdog fault, simply diode-OR connect
WDO
to
MR
(Figure 8). When a watchdog fault occurs in this
mode,
WDO
goes low, pulling
MR
low and causing a
reset pulse to be issued. As soon as reset is asserted,
the watchdog timer clears and
WDO
goes high. With
WDO
connected to
MR
, a continuous high or low on WDI
will cause 200ms reset pulses to be issued every
1.6sec (SWT connected to V
CC
). When reset is not
asserted, if no transition occurs at WDI during the
watchdog timeout period,
WDO
goes low 70ns after the
falling edge of
WDPO
and remains low until the next tran-
sition at WDI (Figure 7). A single additional flip-flop can
force the system into a hardware shutdown if there are
two successive watchdog faults (Figure 8). When the
MAX792/MAX820 are operated from a 5V supply,
WDO
has a 2 x TTL output characteristic.
Watchdog-Pulse Output
As described in the preceding section,
WDPO
can be
used as the clock input to an external D flip-flop. Upon
the absence of a watchdog edge or pulse at WDI at the
end of a watchdog timeout period,
WDPO
will pulse low
for 1.7ms. The falling edge of
WDPO
precedes
WDO
by
70ns. Since
WDO
is high when
WDPO
goes low, the flip-
flop’s Q output remains high after
WDO
goes low (Figure
8). If the watchdog timer is not reset by a transition at
WDI,
WDO
remains low and the next
WDPO
following a
second watchdog timeout period clocks a logic low to
the Q output, pulling
MR
low and causing the
MAX792/MAX820 latch in reset. If the watchdog timer is
reset by a transition at WDI,
WDO
will go high and the
flip-flop’s Q output will remain high. Thus a system
shutdown is only caused by two successive watchdog
faults.
Selecting an Alternative Watchdog Timeout Period
The SWT input controls the watchdog timeout period.
Connecting SWT to V
CC
selects the internal 1.6sec
watchdog timeout period. Select an alternative watch-
dog timeout period by connecting a capacitor between
SWT and GND. Do not leave SWT floating and do not
connect it to ground. The following formula determines
the watchdog timeout period:
Watchdog Timeout Period =
k x (capacitor value in nF)ms
where k = 27 for V
CC
= 3V, and k = 16.2 for V
CC
= 5V.
This applies for capacitor values in excess of 4.7nF. If
the watchdog function is unused, connect SWT to V
CC
.
WDPO
WDO
WDI
70ns
1.6sec
MIN 100ns (V
CC
= 5V)
MIN 300ns (V
CC
= 3V)
V
CC
= 5V
Figure 7. WDI,
WDO
and
WDPO
Timing Diagram
MAX792
MAX820
* FOR SYSTEM RESET ON EVERY
WATCHDOG FAULT, OMIT THE
FLIP-FLOP, AND DIODE–OR
CONNECT WDOTOMR.
12
GND
3
V
CC
V
CC
0.1
μ
F
9MR
4.7k
+5V
1
RESET
0.1
μ
F
11
16
WDI
WDPO
15
WDO
μ
P POWER
V
CC
RESET
I/O
DCLOCK
CLEAR
Q
Q
V
CC
TWO
CONSECUTIVE
WATCHDOG
FAULT
INDICATION
REACTIVATE
*
Figure 8. Two consecutive watchdog faults latch the system in
reset.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX792_EPE | Dual D-type Positive-Edge-Triggered Flip-Flops With Clear And Preset 14-CDIP -55 to 125 |
| MAX792_ESE | Dual D-type Positive-Edge-Triggered Flip-Flops With Clear And Preset 20-LCCC -55 to 125 |
| MAX792_MJE | Dual D-type Positive-Edge-Triggered Flip-Flops With Clear And Preset 14-CDIP -55 to 125 |
| MAX820_MJE | Microprocessor and Non-Volatile Memory Supervisory Circuits |
| MAX8211 | Microprocessor Voltage Monitors with Programmable Voltage Detection(帶可編程電壓檢測器（非倒相）的μP電壓監(jiān)控器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX792LC/D | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX792LCPE | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX792LCPE+ | 功能描述:監(jiān)控電路 MPU & NV Memory Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX792LCSE | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX792LCSE+ | 功能描述:監(jiān)控電路 MPU & NV Memory Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。