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參數(shù)資料
| 型號： | MAX9122ESE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout |
| 中文描述： | QUAD LINE RECEIVER, PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 231K |
| 代理商： | MAX9122ESE |
M
Quad LVDS Line Receivers with
Integrated Termination and Flow-Through Pinout
8
_______________________________________________________________________________________
Cables and Connectors
Transmission media typically have a controlled differen-
tial impedance of 100
. Use cables and connectors
that have matched differential impedance to minimize
impedance discontinuities.
Avoid the use of unbalanced cables such as ribbon or
simple coaxial cable. Balanced cables such as twisted
pair offer superior signal quality and tend to generate
less EMI due to magnetic field canceling effects.
Balanced cables pick up noise as common mode,
which is rejected by the LVDS receiver.
Termination
The MAX9122 has an integrated termination resistor
connected across the inputs of each receiver. The
value of the integrated resistor is specified in the DC
characteristics.
The MAX9121 requires an external termination resistor.
The termination resistor should match the differential
impedance of the transmission line. Termination resis-
tance values may range between 90
to 132
,
depending on the characteristic impedance of the
transmission medium.
When using the MAX9121, minimize the distance
between the input termination resistors and the
MAX9121 receiver inputs. Use 1% surface-mount resis-
tors.
IN_+
IN_-
OUT_
RECEIVER ENABLED
1/4 MAX9121/MAX9122
50
REQUIRED FOR PULSE GENERATOR.
WHEN TESTING THE MAX9122, ADJUST THE
PULSE GENERATOR OUTPUT TO ACCOUNT
FOR INTERNAL TERMINATION RESISTOR.
*
**
PULSE
GENERATOR**
50
*
50
*
C
L
Figure 2. Propagation Delay and Transition Time Test Circuit
Figure 3. Propagation Delay and Transition Time Waveforms
IN_-
IN_+
OUT_
50%
V
ID
V
OL
V
OH
V
ID
= 0
20%
20%
80%
80%
t
PHLD
t
PLHD
t
THL
t
TLH
V
ID
= 0
50%
V
ID
= (V
IN_+
) - (V
IN_-
)
NOTE
: V
CM
= (V
IN-
+ V
IN+
)
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX9122EUE | Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout |
| MAX9121 | Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout |
| MAX9126ESE | Quad LVDS Line Receivers with Integrated Termination |
| MAX9125ESE | Quad LVDS Line Receivers with Integrated Termination |
| MAX9125EUE | Quad LVDS Line Receivers with Integrated Termination |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9122ESE+ | 制造商:Maxim Integrated Products 功能描述:LINE RCVR 4RX 16SOIC N - Bulk |
| MAX9122ESE+T | 制造商:Maxim Integrated Products 功能描述:LINE RCVR 4RX 16SOIC N - Tape and Reel |
| MAX9122ESE-T | 制造商:Maxim Integrated Products 功能描述:QUAD LVDS LINE RECEIVER WITH INTEGRATED TERMI - Tape and Reel |
| MAX9122EUE | 功能描述:LVDS 接口集成電路 Quad LVDS Line Driver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9122EUE+ | 功能描述:LVDS 接口集成電路 Quad LVDS Line Receiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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