參數(shù)資料
型號(hào): MAX912MJE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Single/Dual, Ultra-Fast, Low-Power, Precision TTL Comparators
中文描述: DUAL COMPARATOR, 3000 uV OFFSET-MAX, 16 ns RESPONSE TIME, CDIP16
封裝: 0.300 INCH, CERDIP-16
文件頁數(shù): 8/8頁
文件大?。?/td> 93K
代理商: MAX912MJE
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8
___________________Maxim Integrated Produc ts, 120 S an Gabriel Drive, S unnyvale, CA 94086 (408) 737-7600
1994 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
M
S ingle/Dual, Ultra-Fast, Low-Power,
Prec ision T T L Comparators
HYSTERESIS
BAND*
IN+
IN-
Q
* WHEN HYSTERESIS IS ADDED, A COMPARATOR CANNOT RESOLVE ANY INPUT SIGNAL WITHIN THE HYSTERESIS BAND.
WITH HYSTERESIS
IDEAL (WITHOUT HYSTERESIS)
.
.
.
.
.
.
..
.
.
.
.
.
.
Figure 2. Effect of Hysteresis on Input Resolution
__________________________________________________________Chip Topographies
supply pins, keeping leads short to minimize lead
inductance. For particularly noisy applications, use fer-
rite beads on the power-supply lines.
Board Layout
As with all high-speed components, careful attention to
layout is essential for best performance.
1) Use a printed circuit board with an unbroken
ground plane.
2) Pay close attention to the bandwidth of bypass
components and keep leads short.
3) Avoid sockets; solder the comparator and other
components directly to the board to minimize
unwanted parasitic inductance and capacitance.
Input S lew Rate
The MAX912/MAX913 design eliminates the input slew-
rate requirement imposed on many standard compara-
tors. As long as LE is high after the maximum propaga-
tion delay and the input is greater than the compara-
tor’s total DC error, the output will be valid without oscil-
lations.
Maximum Cloc k (LE) and S ignal Rate
The maximum clock and signal rate is 70MHz, based
on the comparator’s rise and fall time with a 5mV over-
drive at +25°C (Figure 1). With a 20mV overdrive, the
maximum propagation delay is 12ns and the clock and
signal rate is 85MHz.
V-
LEA
GND
LEB
GND
INB-
QB
0.071"
(1.80mm)
0.080"
(2.03mm)
INB+
INA+
INA-
QB
QA QA
V+
V+
V-
LE
IN-
0.056"
(1.42mm)
0.058"
(1.47mm)
IN+
V+
Q
GND
Q
MAX913
MAX912
TRANSISTOR COUNT: 100;
SUBSTRATE CONNECTED TO V-.
TRANSISTOR COUNT: 197;
SUBSTRATE CONNECTED TO V-.
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