- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9851 > MAX9163ESA+ (Maxim Integrated Products)IC TXRX LVDS BUS 3.3V 8-SOIC PDF資料下載
參數(shù)資料
| 型號： | MAX9163ESA+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX LVDS BUS 3.3V 8-SOIC |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 100 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 管件 |
Detailed Description
The MAX9163 high-speed BLVDS transceiver is
designed specifically for heavily loaded multipoint bus
applications. The MAX9163 operates from a single 3.3V
power supply, and is pin compatible with DS92LV010A.
The transceiver consists of one differential BLVDS line
driver and one LVDS receiver. The driver outputs and
receiver inputs are connected internally to minimize
bus loading. The driver and receiver can be enabled or
disabled individually or simultaneously by the use of
enable logic inputs (DE, RE).
The MAX9163 driver output uses a current-steering
configuration to generate a 9mA (typ) output current.
This current-steering approach induces less ground
bounce and no shoot-through current, enhancing noise
margin and system speed performance. The outputs
are short-circuit current limited. The MAX9163 current-
steering output requires a resistive load to terminate the
signal and complete the transmission loop. With a typi-
cal 9mA output current, the MAX9163 produces a
243mV output voltage when driving a bus terminated
with two 54
resistors (9mA x 27 = 243mV).
The MAX9163 receiver detects a differential input as
low as 100mV and translates it to a single-ended out-
put. The device features an in-path fail-safe circuit that
sets the receiver output high when the receiver inputs
are undriven and open, terminated, or shorted.
Receiver In-Path Fail-Safe
The MAX9163 has in-path fail-safe circuitry, which is
designed with a +35mV input offset voltage, a 2.5A
current source between VCC and the noninverting
input, and a 5A current sink between the inverting
input and ground (Figure 6). If the differential input is
open, the 2.5A current source pulls the input to about
VCC - 0.7V and the 5A source sink pulls the inverting
input to ground, which drives the receiver output high.
If the differential input is shorted or terminated with a
typical value termination resistor, the +35mV offset dri-
ves the receiver output high. If the input is terminated
and floating, the receiver output is driven high by the
+35mV offset, and the 2:1 current sink to current
source ratio (5A:2.5A) pulls the inputs to ground.
This can be an advantage when switching between dri-
vers on a multipoint bus. The change in common-mode
voltage on the MAX9163 is from ground to the typical
driver offset voltage of 1.2V. This is less than the
change from VCC to 1.2V found on some circuits where
the fail-safe circuitry pulls the bus to VCC.
Effects of Capacitive Loading
The characteristic impedance of a differential PC board
trace is uniformly reduced when equal capacitive loads
are attached at equal intervals (provided that the transi-
tion time of the signal being driven on the trace is
longer than the delay between loads). This kind of load-
ing is typical of multipoint buses where cards are
attached at 1in or 0.8in intervals along the length of a
backplane. The reduction in characteristic impedance
is approximated by the following formula:
where:
ZDF-unloaded = unloaded differential characteristic
impedance
CO = unloaded trace capacitance (pF/unit length)
CL = value of each capacitive load (pF)
N = number of capacitive loads
L = trace length
ZZ
x
C
N x C
L
DF loaded
DF unloaded
O
L
--
=+
[
/ (
(
/ ))]
MAX9163
Bus LVDS 3.3V Single Transceiver
8
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1DE
LVTTL/LVCMOS Driver Enable Input. The driver is enabled when DE is high. When DE is low, the driver output
is disabled and is high impedance.
2
DIN
LVTTL/LVCMOS Driver Input
3
ROUT
LVTTL/LVCMOS Receiver Output
4
GND
Ground
5
RE
LVTTL/LVCMOS Receiver Enable Input. The receiver is enabled when RE is low. When RE is high, the receiver
output is disabled and is high impedance.
6
DO-/RI-
Inverting BLVDS Driver Output/Receiver Input
7
DO+/RI+
Noninverting BLVDS Driver Output/Receiver Input
8VCC
Power-Supply Input. Bypass VCC to GND with 0.1F and 0.001F ceramic capacitors.
相關PDF資料 |
PDF描述 |
|---|---|
| VI-JNX-MX-F4 | CONVERTER MOD DC/DC 5.2V 75W |
| MAX3314ECSA+T | IC TXRX RS232 460KBPS 8-SOIC |
| MAX3311ECUB+T | IC TXRX RS232 460KBPS 10-UMAX |
| MAX3313ECUB+T | IC TXRX RS232 460KBPS 10-UMAX |
| ICL7109EQH+D | IC ADC 12BIT 3-ST 44-PLCC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9163ESA+ | 功能描述:LVDS 接口集成電路 Bus LVDS 3.3V Single Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9163ESA+T | 功能描述:LVDS 接口集成電路 Bus LVDS 3.3V Single Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9163ESA-T | 功能描述:LVDS 接口集成電路 Bus LVDS 3.3V Single Transceiver RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9164 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V Single LVDS Driver/Receiver |
| MAX9164ESD | 制造商:Maxim Integrated Products 功能描述: 制造商:Maxim Integrated Products 功能描述:3.3V SINGLE LVDS DRIVER/RECEIVER - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復。