參數(shù)資料
型號(hào)： MAX9171EKA-T
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 通用總線功能
英文描述： Single/Dual LVDS Line Receivers with “In-Path” Fail-Safe
中文描述： LINE RECEIVER, PDSO8
封裝： MO-178BA, SOT-23, 8 PIN
文件頁數(shù)： 2/12頁
文件大?。?/td> 303K
代理商： MAX9171EKA-T
M
Single/Dual LVDS Line Receivers with
“In-Path” Fail-Safe
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND...........................................................-0.3V to +4.0V
IN_+, IN_- to GND.................................................-0.3V to +4.0V
OUT_ to GND ............................................-0.3V to (V
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C) ...........714mW
8-Pin SO (derate 5.9mW/°C above +70°C) .................471mW
8-Pin TDFN (derate 24.4mW/°C above +70°C) ........1951mW
ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, differential input voltage |V
ID
| = 0.1V to 1.2V, receiver input voltage = 0 to V
CC
, common-mode voltage V
CM
=
|V
ID
/2| to (V
CC
- |V
ID
/2|), T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= 3.3V, |V
ID
| = 0.2V, V
CM
= 1.2V,
T
A
= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
ESD Protection
Human Body Model (IN_+, IN_-) ...................................±13kV
Lead Temperature (soldering, 10s) ................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVDS INPUTS (IN_+, IN_-)
Differential Input High Threshold
Differential Input Low Threshold
Input Current (Noninverting Input)
V
TH
V
TL
I
IN+
Figure 1
Figure 1
Figure 1
-40
-40
-2.1
0
mV
mV
μA
-100
+0.5
-5.0
Power-Off Input Current
(Noninverting Input)
I
IN+OFF
V
IN+
= 0 to 3.6V, V
IN-
= 0 to 3.6V, V
CC
= 0
or open (Figure 1)
-0.5
0
+0.5
μA
Input Current (Inverting Input)
I
IN-
Figure 1
-0.5
+4.4
+10.0
μA
Power-Off Input Current
(Inverting Input)
I
IN-OFF
V
IN+
= 0 to 3.6V, V
IN-
= 0 to 3.6V, V
CC
= 0
or open (Figure 1)
-0.5
0
+0.5
μA
LVCMOS/LVTTL OUTPUTS (OUT_)
Open, undriven short, or
undriven parallel termination
2.7
3.2
Output High Voltage
V
OH
I
OH
= -4.0mA
V
ID
= 0V
2.7
3.2
0.1
V
Output Low Voltage
V
OL
I
OL
= 4.0mA, V
ID
= -100mV
0.4
V
Output Short-Circuit Current
I
OS
V
OUT_
= 0 (Note 3)
-45
-77
-120
mA
POWER SUPPLY
MAX9171
MAX9172
3.6
7.0
6
9
Supply Current
I
CC
Inputs open
mA
相關(guān)PDF資料
PDF描述
MAX9171ESA Single/Dual LVDS Line Receivers with “In-Path” Fail-Safe
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